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[NVPTX] Restrict combining to properly aligned v16i8 vectors. #107919

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Merged
merged 1 commit into from
Sep 9, 2024
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[NVPTX] Restrict combining to properly aligned v16i8 vectors. #107919

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6 changes: 5 additions & 1 deletion llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -6038,7 +6038,11 @@ static SDValue PerformLOADCombine(SDNode *N,
// elements can be optimised away instead of being needlessly split during
// legalization, which involves storing to the stack and loading it back.
EVT VT = N->getValueType(0);
if (VT != MVT::v16i8)
bool CorrectlyAligned =
DCI.DAG.getTargetLoweringInfo().allowsMemoryAccessForAlignment(
*DAG.getContext(), DAG.getDataLayout(), LD->getMemoryVT(),
*LD->getMemOperand());
if (!(VT == MVT::v16i8 && CorrectlyAligned))
return SDValue();

SDLoc DL(N);
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