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[DAGCombiner] Ensure poison-generating flags are stripped in freeze op #114582

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1 change: 1 addition & 0 deletions llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -16151,6 +16151,7 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
SVN->getMask());
} else {
// NOTE: this strips poison generating flags.
N0->dropFlags(SDNodeFlags::PoisonGeneratingFlags);
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@dtcxzyw dtcxzyw Nov 2, 2024

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I don't think it is a correct fix. The following getNode creates a new copy without flags. However, it is CSEed to N0 in SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, ArrayRef<SDValue> Ops, const SDNodeFlags Flags).

We should intersect flags after CSE here:

if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
return SDValue(E, 0);

if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
return SDValue(E, 0);

I will post a fix later.

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getNode creates a copy, but N0 is still the original node. It is indeed CSE'd, but the flag has been dropped by the time it gets CSE'd.

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but the flag has been dropped by the time it gets CSE'd.

I printed the node returned by FindNodeOrInsertPos and got select_cc samesign. The flags are not dropped. It should be fixed by #114650.

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@antoniofrighetto antoniofrighetto Nov 2, 2024

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Quite strange. I just tried again and confirm the node returned here:

if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
return SDValue(E, 0);

is i32 = select_cc t12, t28, t16, t2, setult:ch, immediately after visiting freeze in DAGCombiner, nullptr otherwise. I'm happy with your patch too.

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baseline: f1e1055

diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 7eef09e55101..b5bc6d925b41 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -16150,8 +16150,12 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
     R = DAG.getVectorShuffle(N0.getValueType(), SDLoc(N0), Ops[0], Ops[1],
                              SVN->getMask());
   } else {
+    errs() << "N0: ";
+    N0->dump();
     // NOTE: this strips poison generating flags.
     R = DAG.getNode(N0.getOpcode(), SDLoc(N0), N0->getVTList(), Ops);
+    errs() << "R: ";
+    R->dump();
   }
   assert(DAG.isGuaranteedNotToBeUndefOrPoison(R, /*PoisonOnly*/ false) &&
          "Can't create node that may be undef/poison!");
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index d5cdd7163d79..a533ac910588 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -10318,8 +10318,11 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
     AddNodeIDNode(ID, Opcode, VTs, Ops);
     void *IP = nullptr;
 
-    if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
+    if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
+      errs() << "E: ";
+      E->dump();
       return SDValue(E, 0);
+    }
 
     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
     createOperands(N, Ops);
N0: t27: i32 = select_cc samesign t12, t28, t16, t2, setult:ch
E: t27: i32 = select_cc samesign t12, t28, t16, t2, setult:ch
R: t27: i32 = select_cc samesign t12, t28, t16, t2, setult:ch

R = DAG.getNode(N0.getOpcode(), SDLoc(N0), N0->getVTList(), Ops);
}
assert(DAG.isGuaranteedNotToBeUndefOrPoison(R, /*PoisonOnly*/ false) &&
Expand Down
25 changes: 25 additions & 0 deletions llvm/test/CodeGen/ARM/dagcombine-drop-flags-freeze.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,25 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=arm-linux-gnueabi -mcpu=arm1022e -o - %s | FileCheck %s

; Ensure poison-generating flags are stripped by the time a freeze operand is visited.

define i1 @drop_flags(i32 noundef %numentries, i64 %cond, i64 %arg) {
; CHECK-LABEL: drop_flags:
; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: ldm sp, {r1, r12}
; CHECK-NEXT: subs r1, r2, r1
; CHECK-NEXT: sbcs r1, r3, r12
; CHECK-NEXT: movlo r0, r2
; CHECK-NEXT: clz r0, r0
; CHECK-NEXT: lsr r0, r0, #5
; CHECK-NEXT: bx lr
entry:
%cmp4 = icmp samesign ult i64 %cond, %arg
%conv6 = trunc nuw i64 %cond to i32
%spec.select = select i1 %cmp4, i32 %conv6, i32 %numentries
%spec.select.fr = freeze i32 %spec.select
%cmpz = icmp eq i32 %spec.select.fr, 0
ret i1 %cmpz
}

declare i32 @llvm.ctlz.i32(i32, i1)
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Unused.

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