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[llvm] Add BasicTTIImpl::areInlineCompatible for target feature subset checks #117493

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Merged
merged 1 commit into from
Nov 25, 2024
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[llvm] Add BasicTTIImpl::areInlineCompatible for target feature subset checks #117493

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14 changes: 14 additions & 0 deletions llvm/include/llvm/CodeGen/BasicTTIImpl.h
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Original file line number Diff line number Diff line change
Expand Up @@ -277,6 +277,20 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
E, AddressSpace, Alignment, MachineMemOperand::MONone, Fast);
}

bool areInlineCompatible(const Function *Caller,
const Function *Callee) const {
const TargetMachine &TM = getTLI()->getTargetMachine();

const FeatureBitset &CallerBits =
TM.getSubtargetImpl(*Caller)->getFeatureBits();
const FeatureBitset &CalleeBits =
TM.getSubtargetImpl(*Callee)->getFeatureBits();

// Inline a callee if its target-features are a subset of the callers
// target-features.
return (CallerBits & CalleeBits) == CalleeBits;
}

bool hasBranchDivergence(const Function *F = nullptr) { return false; }

bool isSourceOfDivergence(const Value *V) { return false; }
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11 changes: 1 addition & 10 deletions llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
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Expand Up @@ -266,16 +266,7 @@ bool AArch64TTIImpl::areInlineCompatible(const Function *Caller,
return false;
}

const TargetMachine &TM = getTLI()->getTargetMachine();

const FeatureBitset &CallerBits =
TM.getSubtargetImpl(*Caller)->getFeatureBits();
const FeatureBitset &CalleeBits =
TM.getSubtargetImpl(*Callee)->getFeatureBits();

// Inline a callee if its target-features are a subset of the callers
// target-features.
return (CallerBits & CalleeBits) == CalleeBits;
return BaseT::areInlineCompatible(Caller, Callee);
}

bool AArch64TTIImpl::areTypesABICompatible(
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14 changes: 0 additions & 14 deletions llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
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Expand Up @@ -2330,20 +2330,6 @@ bool RISCVTTIImpl::isLegalMaskedCompressStore(Type *DataTy, Align Alignment) {
return true;
}

bool RISCVTTIImpl::areInlineCompatible(const Function *Caller,
const Function *Callee) const {
const TargetMachine &TM = getTLI()->getTargetMachine();

const FeatureBitset &CallerBits =
TM.getSubtargetImpl(*Caller)->getFeatureBits();
const FeatureBitset &CalleeBits =
TM.getSubtargetImpl(*Callee)->getFeatureBits();

// Inline a callee if its target-features are a subset of the callers
// target-features.
return (CallerBits & CalleeBits) == CalleeBits;
}

/// See if \p I should be considered for address type promotion. We check if \p
/// I is a sext with right type and used in memory accesses. If it used in a
/// "complex" getelementptr, we allow it to be promoted without finding other
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3 changes: 0 additions & 3 deletions llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
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Expand Up @@ -60,9 +60,6 @@ class RISCVTTIImpl : public BasicTTIImplBase<RISCVTTIImpl> {
: BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}

bool areInlineCompatible(const Function *Caller,
const Function *Callee) const;

/// Return the cost of materializing an immediate for a value operand of
/// a store instruction.
InstructionCost getStoreImmCost(Type *VecTy, TTI::OperandValueInfo OpInfo,
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18 changes: 0 additions & 18 deletions llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
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Expand Up @@ -104,24 +104,6 @@ TTI::ReductionShuffle WebAssemblyTTIImpl::getPreferredExpandedReductionShuffle(
return TTI::ReductionShuffle::SplitHalf;
}

bool WebAssemblyTTIImpl::areInlineCompatible(const Function *Caller,
const Function *Callee) const {
// Allow inlining only when the Callee has a subset of the Caller's
// features. In principle, we should be able to inline regardless of any
// features because WebAssembly supports features at module granularity, not
// function granularity, but without this restriction it would be possible for
// a module to "forget" about features if all the functions that used them
// were inlined.
const TargetMachine &TM = getTLI()->getTargetMachine();

const FeatureBitset &CallerBits =
TM.getSubtargetImpl(*Caller)->getFeatureBits();
const FeatureBitset &CalleeBits =
TM.getSubtargetImpl(*Callee)->getFeatureBits();

return (CallerBits & CalleeBits) == CalleeBits;
}

void WebAssemblyTTIImpl::getUnrollingPreferences(
Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP,
OptimizationRemarkEmitter *ORE) const {
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3 changes: 0 additions & 3 deletions llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
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Expand Up @@ -72,9 +72,6 @@ class WebAssemblyTTIImpl final : public BasicTTIImplBase<WebAssemblyTTIImpl> {
TTI::ReductionShuffle
getPreferredExpandedReductionShuffle(const IntrinsicInst *II) const;

bool areInlineCompatible(const Function *Caller,
const Function *Callee) const;

bool supportsTailCalls() const;

bool isProfitableToSinkOperands(Instruction *I,
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