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Merged
merged 2 commits into from
Dec 6, 2024
Merged

Handle scalable store size in MemCpyOptimizer #118957

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7e2d603
Handle scalable store size in MemCpyOptimizer
momchil-velikov Dec 6, 2024
eca59d2
[fixup] Don't create a call to memset and move test to vscale-memset.ll
momchil-velikov Dec 6, 2024
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3 changes: 2 additions & 1 deletion llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -800,8 +800,9 @@ bool MemCpyOptPass::processStore(StoreInst *SI, BasicBlock::iterator &BBI) {
// in subsequent passes.
auto *T = V->getType();
if (T->isAggregateType()) {
uint64_t Size = DL.getTypeStoreSize(T);
IRBuilder<> Builder(SI);
Value *Size =
Builder.CreateTypeSize(Builder.getInt64Ty(), DL.getTypeStoreSize(T));
auto *M = Builder.CreateMemSet(SI->getPointerOperand(), ByteVal, Size,
SI->getAlign());
M->copyMetadata(*SI, LLVMContext::MD_DIAssignID);
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56 changes: 56 additions & 0 deletions llvm/test/CodeGen/AArch64/memset-scalable-size.ll
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@@ -0,0 +1,56 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S --passes=memcpyopt < %s | FileCheck %s
target triple = "aarch64-unknown-linux"

define void @f0() {
; CHECK-LABEL: define void @f0() {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[P:%.*]] = alloca { <vscale x 16 x i1>, <vscale x 16 x i1> }, align 2
; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[TMP0]], 4
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 2 [[P]], i8 0, i64 [[TMP1]], i1 false)
; CHECK-NEXT: call void @g(ptr [[P]])
; CHECK-NEXT: ret void
;
entry:
%p = alloca { <vscale x 16 x i1>, <vscale x 16 x i1>}, align 2
store { <vscale x 16 x i1>, <vscale x 16 x i1> } zeroinitializer, ptr %p, align 2
call void @g(ptr %p)
ret void
}

define void @f1() {
; CHECK-LABEL: define void @f1() {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[P:%.*]] = alloca { <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> }, align 16
; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[TMP0]], 48
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[P]], i8 0, i64 [[TMP1]], i1 false)
; CHECK-NEXT: call void @g(ptr [[P]])
; CHECK-NEXT: ret void
;
entry:
%p = alloca {<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> }, align 16
store {<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float> } zeroinitializer, ptr %p, align 16
call void @g(ptr %p)
ret void
}

define void @f2() {
; CHECK-LABEL: define void @f2() {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[P:%.*]] = alloca { <vscale x 8 x double>, <vscale x 8 x double>, <vscale x 8 x double> }, align 16
; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[TMP0]], 192
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 16 [[P]], i8 0, i64 [[TMP1]], i1 false)
; CHECK-NEXT: call void @g(ptr [[P]])
; CHECK-NEXT: ret void
;
entry:
%p = alloca {<vscale x 8 x double>, <vscale x 8 x double>, <vscale x 8 x double> }, align 16
store {<vscale x 8 x double>, <vscale x 8 x double>, <vscale x 8 x double> } zeroinitializer, ptr %p, align 16
call void @g(ptr %p)
ret void
}

declare void @g(ptr)
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