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Revert "[AMDGPU][True16][MC] update vop2 mc test with update script (… #119253

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Merged
merged 1 commit into from
Dec 9, 2024
Merged

Revert "[AMDGPU][True16][MC] update vop2 mc test with update script (… #119253

merged 1 commit into from
Dec 9, 2024

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broxigarchen
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The previous patch https://github.com/llvm/llvm-project/pull/116860/files#diff-e7e06355c973f68f900d2a34a4103dbfa022589c55c59d02870da9365acf7b98L651

seems to mistakenly overwrites true16 test lines.

i.e.

v_fmaak_f16 v5.l, v1.l, v2.l, 0xfe0b
to

v_fmaak_f16 v5, v1, v2, 0xfe0b
Planned to revert patch
#117195
#116860
and redo these two.

This is the revert of the patch 116860.

@llvmbot llvmbot added backend:AMDGPU mc Machine (object) code labels Dec 9, 2024
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llvmbot commented Dec 9, 2024 •
edited
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@llvm/pr-subscribers-mc

@llvm/pr-subscribers-backend-amdgpu

Author: Brox Chen (broxigarchen)

Changes

The previous patch https://github.com/llvm/llvm-project/pull/116860/files#diff-e7e06355c973f68f900d2a34a4103dbfa022589c55c59d02870da9365acf7b98L651

seems to mistakenly overwrites true16 test lines.

i.e.

v_fmaak_f16 v5.l, v1.l, v2.l, 0xfe0b
to

v_fmaak_f16 v5, v1, v2, 0xfe0b
Planned to revert patch
#117195
#116860
and redo these two.

This is the revert of the patch 116860.

Patch is 1.57 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/119253.diff

12 Files Affected:

  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2.s (+993-976)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s (+796-797)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s (+171-169)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s (+730-730)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s (+206-206)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s (+798-798)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop2.s (+1013-978)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s (+762-757)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s (+168-163)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s (+824-824)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s (+772-772)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s (+283-283)
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
index ac81d3f8bd08df..0f2852fc531ed4 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
@@ -1,2555 +1,2572 @@
-// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
 // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
 // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64,+real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
 // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
 // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
 
 v_add_co_ci_u32_e32 v5, vcc_lo, v1, v2, vcc_lo
-// W32: v_add_co_ci_u32_e32 v5, vcc_lo, v1, v2, vcc_lo ; encoding: [0x01,0x05,0x0a,0x40]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0x01,0x05,0x0a,0x40]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc_lo, v255, v2, vcc_lo
-// W32: v_add_co_ci_u32_e32 v5, vcc_lo, v255, v2, vcc_lo ; encoding: [0xff,0x05,0x0a,0x40]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0xff,0x05,0x0a,0x40]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc_lo, s1, v2, vcc_lo
-// W32: v_add_co_ci_u32_e32 v5, vcc_lo, s1, v2, vcc_lo ; encoding: [0x01,0x04,0x0a,0x40]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0x01,0x04,0x0a,0x40]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc_lo, s105, v2, vcc_lo
-// W32: v_add_co_ci_u32_e32 v5, vcc_lo, s105, v2, vcc_lo ; encoding: [0x69,0x04,0x0a,0x40]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0x69,0x04,0x0a,0x40]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc_lo, vcc_lo, v2, vcc_lo
-// W32: v_add_co_ci_u32_e32 v5, vcc_lo, vcc_lo, v2, vcc_lo ; encoding: [0x6a,0x04,0x0a,0x40]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0x6a,0x04,0x0a,0x40]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc_lo, vcc_hi, v2, vcc_lo
-// W32: v_add_co_ci_u32_e32 v5, vcc_lo, vcc_hi, v2, vcc_lo ; encoding: [0x6b,0x04,0x0a,0x40]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0x6b,0x04,0x0a,0x40]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc_lo, ttmp15, v2, vcc_lo
-// W32: v_add_co_ci_u32_e32 v5, vcc_lo, ttmp15, v2, vcc_lo ; encoding: [0x7b,0x04,0x0a,0x40]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0x7b,0x04,0x0a,0x40]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc_lo, m0, v2, vcc_lo
-// W32: v_add_co_ci_u32_e32 v5, vcc_lo, m0, v2, vcc_lo ; encoding: [0x7d,0x04,0x0a,0x40]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0x7d,0x04,0x0a,0x40]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc_lo, exec_lo, v2, vcc_lo
-// W32: v_add_co_ci_u32_e32 v5, vcc_lo, exec_lo, v2, vcc_lo ; encoding: [0x7e,0x04,0x0a,0x40]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0x7e,0x04,0x0a,0x40]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc_lo, exec_hi, v2, vcc_lo
-// W32: v_add_co_ci_u32_e32 v5, vcc_lo, exec_hi, v2, vcc_lo ; encoding: [0x7f,0x04,0x0a,0x40]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0x7f,0x04,0x0a,0x40]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc_lo, null, v2, vcc_lo
-// W32: v_add_co_ci_u32_e32 v5, vcc_lo, null, v2, vcc_lo ; encoding: [0x7c,0x04,0x0a,0x40]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0x7c,0x04,0x0a,0x40]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc_lo, -1, v2, vcc_lo
-// W32: v_add_co_ci_u32_e32 v5, vcc_lo, -1, v2, vcc_lo ; encoding: [0xc1,0x04,0x0a,0x40]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0xc1,0x04,0x0a,0x40]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc_lo, 0.5, v2, vcc_lo
-// W32: v_add_co_ci_u32_e32 v5, vcc_lo, 0.5, v2, vcc_lo ; encoding: [0xf0,0x04,0x0a,0x40]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0xf0,0x04,0x0a,0x40]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc_lo, src_scc, v2, vcc_lo
-// W32: v_add_co_ci_u32_e32 v5, vcc_lo, src_scc, v2, vcc_lo ; encoding: [0xfd,0x04,0x0a,0x40]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0xfd,0x04,0x0a,0x40]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v255, vcc_lo, 0xaf123456, v255, vcc_lo
-// W32: v_add_co_ci_u32_e32 v255, vcc_lo, 0xaf123456, v255, vcc_lo ; encoding: [0xff,0xfe,0xff,0x41,0x56,0x34,0x12,0xaf]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W32: encoding: [0xff,0xfe,0xff,0x41,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc, v1, v2, vcc
-// W64: v_add_co_ci_u32_e32 v5, vcc, v1, v2, vcc ; encoding: [0x01,0x05,0x0a,0x40]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0x01,0x05,0x0a,0x40]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc, v255, v2, vcc
-// W64: v_add_co_ci_u32_e32 v5, vcc, v255, v2, vcc ; encoding: [0xff,0x05,0x0a,0x40]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0xff,0x05,0x0a,0x40]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc, s1, v2, vcc
-// W64: v_add_co_ci_u32_e32 v5, vcc, s1, v2, vcc ; encoding: [0x01,0x04,0x0a,0x40]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0x01,0x04,0x0a,0x40]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc, s105, v2, vcc
-// W64: v_add_co_ci_u32_e32 v5, vcc, s105, v2, vcc ; encoding: [0x69,0x04,0x0a,0x40]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0x69,0x04,0x0a,0x40]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc, vcc_lo, v2, vcc
-// W64: v_add_co_ci_u32_e32 v5, vcc, vcc_lo, v2, vcc ; encoding: [0x6a,0x04,0x0a,0x40]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0x6a,0x04,0x0a,0x40]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc, vcc_hi, v2, vcc
-// W64: v_add_co_ci_u32_e32 v5, vcc, vcc_hi, v2, vcc ; encoding: [0x6b,0x04,0x0a,0x40]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0x6b,0x04,0x0a,0x40]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc, ttmp15, v2, vcc
-// W64: v_add_co_ci_u32_e32 v5, vcc, ttmp15, v2, vcc ; encoding: [0x7b,0x04,0x0a,0x40]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0x7b,0x04,0x0a,0x40]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc, m0, v2, vcc
-// W64: v_add_co_ci_u32_e32 v5, vcc, m0, v2, vcc ; encoding: [0x7d,0x04,0x0a,0x40]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0x7d,0x04,0x0a,0x40]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc, exec_lo, v2, vcc
-// W64: v_add_co_ci_u32_e32 v5, vcc, exec_lo, v2, vcc ; encoding: [0x7e,0x04,0x0a,0x40]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0x7e,0x04,0x0a,0x40]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc, exec_hi, v2, vcc
-// W64: v_add_co_ci_u32_e32 v5, vcc, exec_hi, v2, vcc ; encoding: [0x7f,0x04,0x0a,0x40]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0x7f,0x04,0x0a,0x40]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc, null, v2, vcc
-// W64: v_add_co_ci_u32_e32 v5, vcc, null, v2, vcc ; encoding: [0x7c,0x04,0x0a,0x40]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0x7c,0x04,0x0a,0x40]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc, -1, v2, vcc
-// W64: v_add_co_ci_u32_e32 v5, vcc, -1, v2, vcc ; encoding: [0xc1,0x04,0x0a,0x40]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0xc1,0x04,0x0a,0x40]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc, 0.5, v2, vcc
-// W64: v_add_co_ci_u32_e32 v5, vcc, 0.5, v2, vcc ; encoding: [0xf0,0x04,0x0a,0x40]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0xf0,0x04,0x0a,0x40]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v5, vcc, src_scc, v2, vcc
-// W64: v_add_co_ci_u32_e32 v5, vcc, src_scc, v2, vcc ; encoding: [0xfd,0x04,0x0a,0x40]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0xfd,0x04,0x0a,0x40]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_co_ci_u32 v255, vcc, 0xaf123456, v255, vcc
-// W64: v_add_co_ci_u32_e32 v255, vcc, 0xaf123456, v255, vcc ; encoding: [0xff,0xfe,0xff,0x41,0x56,0x34,0x12,0xaf]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+// W64: encoding: [0xff,0xfe,0xff,0x41,0x56,0x34,0x12,0xaf]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
 
 v_add_f16 v5, v1, v2
-// GFX11: v_add_f16_e32 v5, v1, v2                ; encoding: [0x01,0x05,0x0a,0x64]
+// GFX11: encoding: [0x01,0x05,0x0a,0x64]
 
 v_add_f16 v5, v127, v2
-// GFX11: v_add_f16_e32 v5, v127, v2              ; encoding: [0x7f,0x05,0x0a,0x64]
+// GFX11: encoding: [0x7f,0x05,0x0a,0x64]
 
 v_add_f16 v5, s1, v2
-// GFX11: v_add_f16_e32 v5, s1, v2                ; encoding: [0x01,0x04,0x0a,0x64]
+// GFX11: encoding: [0x01,0x04,0x0a,0x64]
 
 v_add_f16 v5, s105, v2
-// GFX11: v_add_f16_e32 v5, s105, v2              ; encoding: [0x69,0x04,0x0a,0x64]
+// GFX11: encoding: [0x69,0x04,0x0a,0x64]
 
 v_add_f16 v5, vcc_lo, v2
-// GFX11: v_add_f16_e32 v5, vcc_lo, v2            ; encoding: [0x6a,0x04,0x0a,0x64]
+// GFX11: encoding: [0x6a,0x04,0x0a,0x64]
 
 v_add_f16 v5, vcc_hi, v2
-// GFX11: v_add_f16_e32 v5, vcc_hi, v2            ; encoding: [0x6b,0x04,0x0a,0x64]
+// GFX11: encoding: [0x6b,0x04,0x0a,0x64]
 
 v_add_f16 v5, ttmp15, v2
-// GFX11: v_add_f16_e32 v5, ttmp15, v2            ; encoding: [0x7b,0x04,0x0a,0x64]
+// GFX11: encoding: [0x7b,0x04,0x0a,0x64]
 
 v_add_f16 v5, m0, v2
-// GFX11: v_add_f16_e32 v5, m0, v2                ; encoding: [0x7d,0x04,0x0a,0x64]
+// GFX11: encoding: [0x7d,0x04,0x0a,0x64]
 
 v_add_f16 v5, exec_lo, v2
-// GFX11: v_add_f16_e32 v5, exec_lo, v2           ; encoding: [0x7e,0x04,0x0a,0x64]
+// GFX11: encoding: [0x7e,0x04,0x0a,0x64]
 
 v_add_f16 v5, exec_hi, v2
-// GFX11: v_add_f16_e32 v5, exec_hi, v2           ; encoding: [0x7f,0x04,0x0a,0x64]
+// GFX11: encoding: [0x7f,0x04,0x0a,0x64]
 
 v_add_f16 v5, null, v2
-// GFX11: v_add_f16_e32 v5, null, v2              ; encoding: [0x7c,0x04,0x0a,0x64]
+// GFX11: encoding: [0x7c,0x04,0x0a,0x64]
 
 v_add_f16 v5, -1, v2
-// GFX11: v_add_f16_e32 v5, -1, v2                ; encoding: [0xc1,0x04,0x0a,0x64]
+// GFX11: encoding: [0xc1,0x04,0x0a,0x64]
 
 v_add_f16 v5, 0.5, v2
-// GFX11: v_add_f16_e32 v5, 0.5, v2               ; encoding: [0xf0,0x04,0x0a,0x64]
+// GFX11: encoding: [0xf0,0x04,0x0a,0x64]
 
 v_add_f16 v5, src_scc, v2
-// GFX11: v_add_f16_e32 v5, src_scc, v2           ; encoding: [0xfd,0x04,0x0a,0x64]
+// GFX11: encoding: [0xfd,0x04,0x0a,0x64]
 
 v_add_f16 v127, 0xfe0b, v127
-// GFX11: v_add_f16_e32 v127, 0xfe0b, v127        ; encoding: [0xff,0xfe,0xfe,0x64,0x0b,0xfe,0x00,0x00]
+// GFX11: encoding: [0xff,0xfe,0xfe,0x64,0x0b,0xfe,0x00,0x00]
 
 v_add_f32 v5, v1, v2
-// GFX11: v_add_f32_e32 v5, v1, v2                ; encoding: [0x01,0x05,0x0a,0x06]
+// GFX11: encoding: [0x01,0x05,0x0a,0x06]
 
 v_add_f32 v5, v255, v2
-// GFX11: v_add_f32_e32 v5, v255, v2              ; encoding: [0xff,0x05,0x0a,0x06]
+// GFX11: encoding: [0xff,0x05,0x0a,0x06]
 
 v_add_f32 v5, s1, v2
-// GFX11: v_add_f32_e32 v5, s1, v2                ; encoding: [0x01,0x04,0x0a,0x06]
+// GFX11: encoding: [0x01,0x04,0x0a,0x06]
 
 v_add_f32 v5, s105, v2
-// GFX11: v_add_f32_e32 v5, s105, v2              ; encoding: [0x69,0x04,0x0a,0x06]
+// GFX11: encoding: [0x69,0x04,0x0a,0x06]
 
 v_add_f32 v5, vcc_lo, v2
-// GFX11: v_add_f32_e32 v5, vcc_lo, v2            ; encoding: [0x6a,0x04,0x0a,0x06]
+// GFX11: encoding: [0x6a,0x04,0x0a,0x06]
 
 v_add_f32 v5, vcc_hi, v2
-// GFX11: v_add_f32_e32 v5, vcc_hi, v2            ; encoding: [0x6b,0x04,0x0a,0x06]
+// GFX11: encoding: [0x6b,0x04,0x0a,0x06]
 
 v_add_f32 v5, ttmp15, v2
-// GFX11: v_add_f32_e32 v5, ttmp15, v2            ; encoding: [0x7b,0x04,0x0a,0x06]
+// GFX11: encoding: [0x7b,0x04,0x0a,0x06]
 
 v_add_f32 v5, m0, v2
-// GFX11: v_add_f32_e32 v5, m0, v2                ; encoding: [0x7d,0x04,0x0a,0x06]
+// GFX11: encoding: [0x7d,0x04,0x0a,0x06]
 
 v_add_f32 v5, exec_lo, v2
-// GFX11: v_add_f32_e32 v5, exec_lo, v2           ; encoding: [0x7e,0x04,0x0a,0x06]
+// GFX11: encoding: [0x7e,0x04,0x0a,0x06]
 
 v_add_f32 v5, exec_hi, v2
-// GFX11: v_add_f32_e32 v5, exec_hi, v2           ; encoding: [0x7f,0x04,0x0a,0x06]
+// GFX11: encoding: [0x7f,0x04,0x0a,0x06]
 
 v_add_f32 v5, null, v2
-// GFX11: v_add_f32_e32 v5, null, v2              ; encoding: [0x7c,0x04,0x0a,0x06]
+// GFX11: encoding: [0x7c,0x04,0x0a,0x06]
 
 v_add_f32 v5, -1, v2
-// GFX11: v_add_f32_e32 v5, -1, v2                ; encoding: [0xc1,0x04,0x0a,0x06]
+// GFX11: encoding: [0xc1,0x04,0x0a,0x06]
 
 v_add_f32 v5, 0.5, v2
-// GFX11: v_add_f32_e32 v5, 0.5, v2               ; encoding: [0xf0,0x04,0x0a,0x06]
+// GFX11: encoding: [0xf0,0x04,0x0a,0x06]
 
 v_add_f32 v5, src_scc, v2
-// GFX11: v_add_f32_e32 v5, src_scc, v2           ; encoding: [0xfd,0x04,0x0a,0x06]
+// GFX11: encoding: [0xfd,0x04,0x0a,0x06]
 
 v_add_f32 v255, 0xaf123456, v255
-// GFX11: v_add_f32_e32 v255, 0xaf123456, v255    ; encoding: [0xff,0xfe,0xff,0x07,0x56,0x34,0x12,0xaf]
+// GFX11: encoding: [0xff,0xfe,0xff,0x07,0x56,0x34,0x12,0xaf]
 
 v_add_nc_u32 v5, v1, v2
-// GFX11: v_add_nc_u32_e32 v5, v1, v2             ; encoding: [0x01,0x05,0x0a,0x4a]
+// GFX11: encoding: [0x01,0x05,0x0a,0x4a]
 
 v_add_nc_u32 v5, v255, v2
-// GFX11: v_add_nc_u32_e32 v5, v255, v2           ; encoding: [0xff,0x05,0x0a,0x4a]
+// GFX11: encoding: [0xff,0x05,0x0a,0x4a]
 
 v_add_nc_u32 v5, s1, v2
-// GFX11: v_add_nc_u32_e32 v5, s1, v2             ; encoding: [0x01,0x04,0x0a,0x4a]
+// GFX11: encoding: [0x01,0x04,0x0a,0x4a]
 
 v_add_nc_u32 v5, s105, v2
-// GFX11: v_add_nc_u32_e32 v5, s105, v2           ; encoding: [0x69,0x04,0x0a,0x4a]
+// GFX11: encoding: [0x69,0x04,0x0a,0x4a]
 
 v_add_nc_u32 v5, vcc_lo, v2
-// GFX11: v_add_nc_u32_e32 v5, vcc_lo, v2         ; encoding: [0x6a,0x04,0x0a,0x4a]
+// GFX11: encoding: [0x6a,0x04,0x0a,0x4a]
 
 v_add_nc_u32 v5, vcc_hi, v2
-// GFX11: v_add_nc_u32_e32 v5, vcc_hi, v2         ; encoding: [0x6b,0x04,0x0a,0x4a]
+// GFX11: encoding: [0x6b,0x04,0x0a,0x4a]
 
 v_add_nc_u32 v5, ttmp15, v2
-// GFX11: v_add_nc_u32_e32 v5, ttmp15, v2         ; encoding: [0x7b,0x04,0x0a,0x4a]
+// GFX11: encoding: [0x7b,0x04,0x0a,0x4a]
 
 v_add_nc_u32 v5, m0, v2
-// GFX11: v_add_nc_u32_e32 v5, m0, v2             ; encoding: [0x7d,0x04,0x0a,0x4a]
+// GFX11: encoding: [0x7d,0x04,0x0a,0x4a]
 
 v_add_nc_u32 v5, exec_lo, v2
-// GFX11: v_add_nc_u32_e32 v5, exec_lo, v2        ; encoding: [0x7e,0x04,0x0a,0x4a]
+// GFX11: encoding: [0x7e,0x04,0x0a,0x4a]
 
 v_add_nc_u32 v5, exec_hi, v2
-// GFX11: v_add_nc_u32_e32 v5, exec_hi, v2        ; encoding: [0x7f,0x04,0x0a,0x4a]
+// GFX11: encoding: [0x7f,0x04,0x0a,0x4a]
 
 v_add_nc_u32 v5, null, v2
-// GFX11: v_add_nc_u32_e32 v5, null, v2           ; encoding: [0x7c,0x04,0x0a,0x4a]
+// GFX11: encoding: [0x7c,0x04,0x0a,0x4a]
 
 v_add_nc_u32 v5, -1, v2
-// GFX11: v_add_nc_u32_e32 v5, -1, v2             ; encoding: [0xc1,0x04,0x0a,0x4a]
+// GFX11: encoding: [0xc1,0x04,0x0a,0x4a]
 
 v_add_nc_u32 v5, 0.5, v2
-// GFX11: v_add_nc_u32_e32 v5, 0.5, v2            ; encoding: [0xf0,0x04,0x0a,0x4a]
+// GFX11: encoding: [0xf0,0x04,0x0a,0x4a]
 
 v_add_nc_u32 v5, src_scc, v2
-// GFX11: v_add_nc_u32_e32 v5, src_scc, v2        ; encoding: [0xfd,0x04,0x0a,0x4a]
+// GFX11: encoding: [0xfd,0x04,0x0a,0x4a]
 
 v_add_nc_u32 v255, 0xaf123456, v255
-// GFX11: v_add_nc_u32_e32 v255, 0xaf123456, v255 ; encoding: [0xff,0xfe,0xff,0x4b,0x56,0x34,0x12,0xaf]
+// GFX11: encoding: [0xff,0xfe,0xff,0x4b,0x56,0x34,0x12,0xaf]
 
 v_and_b32 v5, v1, v2
-// GFX11: v_and_b32_e32 v5, v1, v2                ; encoding: [0x01,0x05,0x0a,0x36]
+// GFX11: encoding: [0x01,0x05,0x0a,0x36]
 
 v_and_b32 v5, v255, v2
-// GFX11: v_and_b32_e32 v5, v255, v2              ; encoding: [0xff,0x05,0x0a,0x36]
+// GFX11: encoding: [0xff,0x05,0x0a,0x36]
 
 v_and_b32 v5, s1, v2
-// GFX11: v_and_b32_e32 v5, s1, v2                ; encoding: [0x01,0x04,0x0a,0x36]
+// GFX11: encoding: [0x01,0x04,0x0a,0x36]
 
 v_and_b32 v5, s105, v2
-// GFX11: v_and_b32_e32 v5, s105, v2              ; encoding: [0x69,0x04,0x0a,0x36]
+// GFX11: encoding: [0x69,0x04,0x0a,0x36]
 
 v_and_b32 v5, vcc_lo, v2
-// GFX11: v_and_b32_e32 v5, vcc_lo, v2            ; encoding: [0x6a,0x04,0x0a,0x36]
+// GFX11: encoding: [0x6a,0x04,0x0a,0x36]
 
 v_and_b32 v5, vcc_hi, v2
-// GFX11: v_and_b32_e32 v5, vcc_hi, v2            ; encoding: [0x6b,0x04,0x0a,0x36]
+// GFX11: encoding: [0x6b,0x04,0x0a,0x36]
 
 v_and_b32 v5, ttmp15, v2
-// GFX11: v_and_b32_e32 v5, ttmp15, v2            ; encoding: [0x7b,0x04,0x0a,0x36]
+// GFX11: encoding: [0x7b,0x04,0x0a,0x36]
 
 v_and_b32 v5, m0, v2
-// GFX11: v_and_b32_e32 v5, m0, v2                ; encoding: [0x7d,0x04,0x0a,0x36]
+// GFX11: encoding: [0x7d,0x04,0x0a,0x36]
 
 v_and_b32 v5, exec_lo, v2
-// GFX11: v_and_b32_e32 v5, exec_lo, v2           ; encoding: [0x7e,0x04,0x0a,0x36]
+// GFX11: encoding: [0x7e,0x04,0x0a,0x36]
 
 v_and_b32 v5, exec_hi, v2
-// GFX11: v_and_b32_e32 v5, exec_hi, v2           ; encoding: [0x7f,0x04,0x0a,0x36]
+// GFX11: encoding: [0x7f,0x04,0x0a,0x36]
 
 v_and_b32 v5, null, v2
-// GFX11: v_and_b32_e32 v5, null, v2              ; encoding: [0x7c,0x04,0x0a,0x36]
+// GFX11: encoding: [0x7c,0x04,0x0a,0x36]
 
 v_and_b32 v5, -1, v2
-// GFX11: v_and_b32_e32 v5, -1, v2                ; encoding: [0xc1,0x04,0x0a,0x36]
+// GFX11: encoding: [0xc1,0x04,0x0a,0x36]
 
 v_and_b32 v5, 0.5, v2
-// GFX1...
[truncated]

@broxigarchen broxigarchen requested review from arsenm and Sisyph December 9, 2024 19:29
@broxigarchen broxigarchen mentioned this pull request Dec 9, 2024
Merged
@broxigarchen broxigarchen merged commit 0f7b3a9 into llvm:main Dec 9, 2024
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@broxigarchen broxigarchen mentioned this pull request Dec 9, 2024
Merged
broxigarchen added a commit that referenced this pull request Dec 9, 2024
@broxigarchen
[AMDGPU][True16][MC] redo update vop2 mc test with update script (#11…
8471541 
…9263)

This is a NFC change

The previous patch #116860 has
an issue and is reverted in
#119253.

Redo the patch here
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@Sisyph Sisyph Sisyph approved these changes

@arsenm arsenm Awaiting requested review from arsenm

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