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[llvm-mca][FeatureRequest] Itimeline graph, note source of delay for each instruction #136423

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[llvm-mca][FeatureRequest] Itimeline graph, note source of delay for each instruction #136423

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819 changes: 728 additions & 91 deletions llvm/test/tools/llvm-mca/AArch64/Cortex/A510-writeback.s
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9 changes: 8 additions & 1 deletion llvm/test/tools/llvm-mca/AArch64/Cortex/A53-carry-over.s
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Original file line number Diff line number Diff line change
Expand Up @@ -58,7 +58,14 @@ add w19, w20, w21
# CHECK-NEXT: 1.00 - - - - - - - add w19, w20, w21

# CHECK: Timeline view:
# CHECK-NEXT: Index 01234567
# CHECK-NEXT: D: Instruction dispatched
# CHECK-NEXT: e: Instruction executing
# CHECK-NEXT: E: Instruction executed (write-back stage)
# CHECK-NEXT: P: Instruction waiting for data dependency
# CHECK-NEXT: =: Instruction waiting for available HW resource
# CHECK-NEXT: -: Instruction executed, waiting to retire in order.

# CHECK: Index 01234567

# CHECK: [0,0] DeeeE. . ldp w3, w5, [x10], #4
# CHECK-NEXT: [0,1] .DeeE. . add w10, w11, w12
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819 changes: 728 additions & 91 deletions llvm/test/tools/llvm-mca/AArch64/Cortex/A53-writeback.s
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9 changes: 8 additions & 1 deletion llvm/test/tools/llvm-mca/AArch64/Cortex/A55-add-sequence.s
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Original file line number Diff line number Diff line change
Expand Up @@ -56,7 +56,14 @@ add w1, w0, #4
# CHECK-NEXT: 1.00 - - - - - - - - - - - add w1, w0, #4

# CHECK: Timeline view:
# CHECK-NEXT: Index 012345678
# CHECK-NEXT: D: Instruction dispatched
# CHECK-NEXT: e: Instruction executing
# CHECK-NEXT: E: Instruction executed (write-back stage)
# CHECK-NEXT: P: Instruction waiting for data dependency
# CHECK-NEXT: =: Instruction waiting for available HW resource
# CHECK-NEXT: -: Instruction executed, waiting to retire in order.

# CHECK: Index 012345678

# CHECK: [0,0] DeeE . . add w2, w3, #1
# CHECK-NEXT: [0,1] DeeE . . add w4, w3, #2, lsl #12
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9 changes: 8 additions & 1 deletion llvm/test/tools/llvm-mca/AArch64/Cortex/A55-all-views.s
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Original file line number Diff line number Diff line change
Expand Up @@ -90,7 +90,14 @@ str w0, [x21, x18, lsl #2]
# CHECK-NEXT: - - - - - - - - - - - 1.00 str w0, [x21, x18, lsl #2]

# CHECK: Timeline view:
# CHECK-NEXT: 0123456
# CHECK-NEXT: D: Instruction dispatched
# CHECK-NEXT: e: Instruction executing
# CHECK-NEXT: E: Instruction executed (write-back stage)
# CHECK-NEXT: P: Instruction waiting for data dependency
# CHECK-NEXT: =: Instruction waiting for available HW resource
# CHECK-NEXT: -: Instruction executed, waiting to retire in order.

# CHECK: 0123456
# CHECK-NEXT: Index 0123456789

# CHECK: [0,0] DeeE . . .. ldr w4, [x2], #4
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9 changes: 8 additions & 1 deletion llvm/test/tools/llvm-mca/AArch64/Cortex/A55-in-order-retire.s
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Original file line number Diff line number Diff line change
Expand Up @@ -90,7 +90,14 @@ add w7, w9, w0
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - add w7, w9, w0

# CHECK: Timeline view:
# CHECK-NEXT: 012345678
# CHECK-NEXT: D: Instruction dispatched
# CHECK-NEXT: e: Instruction executing
# CHECK-NEXT: E: Instruction executed (write-back stage)
# CHECK-NEXT: P: Instruction waiting for data dependency
# CHECK-NEXT: =: Instruction waiting for available HW resource
# CHECK-NEXT: -: Instruction executed, waiting to retire in order.

# CHECK: 012345678
# CHECK-NEXT: Index 0123456789

# CHECK: [0,0] DeeeeeeeE . . . sdiv w12, w21, w0
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9 changes: 8 additions & 1 deletion llvm/test/tools/llvm-mca/AArch64/Cortex/A55-load-readadv.s
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Original file line number Diff line number Diff line change
Expand Up @@ -509,7 +509,14 @@ ldpsw x0, x1, [x2], #16
# CHECK-NEXT: - - - - - - - - - 1.00 - - ldpsw x0, x1, [x2], #16

# CHECK: Timeline view:
# CHECK-NEXT: 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789
# CHECK-NEXT: D: Instruction dispatched
# CHECK-NEXT: e: Instruction executing
# CHECK-NEXT: E: Instruction executed (write-back stage)
# CHECK-NEXT: P: Instruction waiting for data dependency
# CHECK-NEXT: =: Instruction waiting for available HW resource
# CHECK-NEXT: -: Instruction executed, waiting to retire in order.

# CHECK: 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789
# CHECK-NEXT: Index 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 012345

# CHECK: [0,0] DeeE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . add x2, x3, #1
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9 changes: 8 additions & 1 deletion llvm/test/tools/llvm-mca/AArch64/Cortex/A55-load-store-alias.s
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Original file line number Diff line number Diff line change
Expand Up @@ -64,7 +64,14 @@ ldr x3, [x10]
# CHECK-NEXT: - - - - - - - - - 1.00 - - ldr x3, [x10]

# CHECK: Timeline view:
# CHECK-NEXT: 0123456789 0
# CHECK-NEXT: D: Instruction dispatched
# CHECK-NEXT: e: Instruction executing
# CHECK-NEXT: E: Instruction executed (write-back stage)
# CHECK-NEXT: P: Instruction waiting for data dependency
# CHECK-NEXT: =: Instruction waiting for available HW resource
# CHECK-NEXT: -: Instruction executed, waiting to retire in order.

# CHECK: 0123456789 0
# CHECK-NEXT: Index 0123456789 0123456789

# CHECK: [0,0] DE . . . . . . str x1, [x10]
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9 changes: 8 additions & 1 deletion llvm/test/tools/llvm-mca/AArch64/Cortex/A55-load-store-noalias.s
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Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,14 @@ ldr x3, [x10]
# CHECK-NEXT: - - - - - - - - - 1.00 - - ldr x3, [x10]

# CHECK: Timeline view:
# CHECK-NEXT: 012345
# CHECK-NEXT: D: Instruction dispatched
# CHECK-NEXT: e: Instruction executing
# CHECK-NEXT: E: Instruction executed (write-back stage)
# CHECK-NEXT: P: Instruction waiting for data dependency
# CHECK-NEXT: =: Instruction waiting for available HW resource
# CHECK-NEXT: -: Instruction executed, waiting to retire in order.

# CHECK: 012345
# CHECK-NEXT: Index 0123456789

# CHECK: [0,0] DE . . . str x1, [x10]
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9 changes: 8 additions & 1 deletion llvm/test/tools/llvm-mca/AArch64/Cortex/A55-out-of-order-retire.s
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Original file line number Diff line number Diff line change
Expand Up @@ -88,7 +88,14 @@ add w7, w9, w0
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - add w7, w9, w0

# CHECK: Timeline view:
# CHECK-NEXT: 0123456789
# CHECK-NEXT: D: Instruction dispatched
# CHECK-NEXT: e: Instruction executing
# CHECK-NEXT: E: Instruction executed (write-back stage)
# CHECK-NEXT: P: Instruction waiting for data dependency
# CHECK-NEXT: =: Instruction waiting for available HW resource
# CHECK-NEXT: -: Instruction executed, waiting to retire in order.

# CHECK: 0123456789
# CHECK-NEXT: Index 0123456789 0123

# CHECK: [0,0] DeeeeeeeeeeeeE . . . fdiv s1, s2, s3
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9 changes: 8 additions & 1 deletion llvm/test/tools/llvm-mca/AArch64/Cortex/A55-store-readadv.s
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Original file line number Diff line number Diff line change
Expand Up @@ -401,7 +401,14 @@ stp x0, x1, [x2], #16
# CHECK-NEXT: - - - - - - - - - - - 1.00 stp x0, x1, [x2], #16

# CHECK: Timeline view:
# CHECK-NEXT: 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 012345678
# CHECK-NEXT: D: Instruction dispatched
# CHECK-NEXT: e: Instruction executing
# CHECK-NEXT: E: Instruction executed (write-back stage)
# CHECK-NEXT: P: Instruction waiting for data dependency
# CHECK-NEXT: =: Instruction waiting for available HW resource
# CHECK-NEXT: -: Instruction executed, waiting to retire in order.

# CHECK: 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 012345678
# CHECK-NEXT: Index 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789 0123456789

# CHECK: [0,0] DeeE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . add x2, x3, #1
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