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[TwoAddressInstruction] Use isPlainlyKilled in processTiedPairs #65976

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Merged
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Sep 19, 2023
+39 −73
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[TwoAddressInstruction] Use isPlainlyKilled in processTiedPairs #65976

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4 changes: 2 additions & 2 deletions llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1566,7 +1566,7 @@ TwoAddressInstructionPass::processTiedPairs(MachineInstr *MI,
MachineOperand &MO = MI->getOperand(SrcIdx);
assert(MO.isReg() && MO.getReg() == RegB && MO.isUse() &&
"inconsistent operand info for 2-reg pass");
if (MO.isKill()) {
if (isPlainlyKilled(MO)) {
MO.setIsKill(false);
RemovedKillFlag = true;
}
Expand All @@ -1587,7 +1587,7 @@ TwoAddressInstructionPass::processTiedPairs(MachineInstr *MI,
for (MachineOperand &MO : MI->all_uses()) {
if (MO.getReg() == RegB) {
if (MO.getSubReg() == SubRegB && !IsEarlyClobber) {
if (MO.isKill()) {
if (isPlainlyKilled(MO)) {
MO.setIsKill(false);
RemovedKillFlag = true;
}
Expand Down
24 changes: 8 additions & 16 deletions llvm/test/CodeGen/SystemZ/rot-02.ll
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Expand Up @@ -2,8 +2,8 @@
; Test removal of AND operations that don't affect last 6 bits of rotate amount
; operand.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefixes=CHECK,CHECK-LV
; RUN: llc < %s -mtriple=s390x-linux-gnu -early-live-intervals | FileCheck %s -check-prefixes=CHECK,CHECK-LIS
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -early-live-intervals | FileCheck %s

; Test that AND is not removed when some lower 5 bits are not set.
define i32 @f1(i32 %val, i32 %amt) {
Expand Down Expand Up @@ -76,20 +76,12 @@ define i64 @f4(i64 %val, i64 %amt) {

; Test that AND is not entirely removed if the result is reused.
define i32 @f5(i32 %val, i32 %amt) {
; CHECK-LV-LABEL: f5:
; CHECK-LV: # %bb.0:
; CHECK-LV-NEXT: rll %r2, %r2, 0(%r3)
; CHECK-LV-NEXT: nilf %r3, 63
; CHECK-LV-NEXT: ar %r2, %r3
; CHECK-LV-NEXT: br %r14
;
; CHECK-LIS-LABEL: f5:
; CHECK-LIS: # %bb.0:
; CHECK-LIS-NEXT: rll %r0, %r2, 0(%r3)
; CHECK-LIS-NEXT: nilf %r3, 63
; CHECK-LIS-NEXT: ar %r3, %r0
; CHECK-LIS-NEXT: lr %r2, %r3
; CHECK-LIS-NEXT: br %r14
; CHECK-LABEL: f5:
; CHECK: # %bb.0:
; CHECK-NEXT: rll %r2, %r2, 0(%r3)
; CHECK-NEXT: nilf %r3, 63
; CHECK-NEXT: ar %r2, %r3
; CHECK-NEXT: br %r14
%and = and i32 %amt, 63

%inv = sub i32 32, %and
Expand Down
3 changes: 2 additions & 1 deletion llvm/test/CodeGen/X86/combine-or.ll
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Expand Up @@ -253,7 +253,8 @@ define <4 x i32> @test18(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LIS-NEXT: pblendw {{.*#+}} xmm3 = xmm0[0,1],xmm3[2,3,4,5,6,7]
; CHECK-LIS-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,0,1,1]
; CHECK-LIS-NEXT: pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3,4,5,6,7]
; CHECK-LIS-NEXT: por %xmm2, %xmm0
; CHECK-LIS-NEXT: por %xmm0, %xmm2
; CHECK-LIS-NEXT: movdqa %xmm2, %xmm0
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Regression here but I don't think TwoAddressInstruction is doing anything wrong. I can see RegisterCoalescer rematerializing a V_SET0 in a slightly unfortunate place which causes overlapping lifetimes for (a) one value that wants to use $xmm0 on input and (b) another value that wants to use $xmm0 on return, so one of them has to pick a different register and that causes the extra COPY.

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We have similar issues with multiple zero vector registers, so normally I'd say this is acceptable but I'm worried this change might be encouraging the underlying problem?

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I saw equal and opposite changes of this sort in combine-or.ll and combine-rotates.ll so I suspect it is neither better nor worse, but I'm not sure how to prove that.

; CHECK-LIS-NEXT: retq
%shuf1 = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32><i32 4, i32 0, i32 4, i32 4>
%shuf2 = shufflevector <4 x i32> %b, <4 x i32> zeroinitializer, <4 x i32><i32 0, i32 4, i32 4, i32 4>
Expand Down
78 changes: 26 additions & 52 deletions llvm/test/CodeGen/X86/combine-rotates.ll
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@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2,SSE2-LV
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -early-live-intervals | FileCheck %s --check-prefixes=CHECK,SSE2,SSE2-LIS
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -early-live-intervals | FileCheck %s --check-prefixes=CHECK,SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,XOP
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
Expand Down Expand Up @@ -115,56 +115,30 @@ define i32 @combine_rot_select_zero(i32, i32) {
}

define <4 x i32> @combine_vec_rot_select_zero(<4 x i32>, <4 x i32>) {
; SSE2-LV-LABEL: combine_vec_rot_select_zero:
; SSE2-LV: # %bb.0:
; SSE2-LV-NEXT: pxor %xmm2, %xmm2
; SSE2-LV-NEXT: pcmpeqd %xmm1, %xmm2
; SSE2-LV-NEXT: pslld $23, %xmm1
; SSE2-LV-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE2-LV-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE2-LV-NEXT: cvttps2dq %xmm1, %xmm1
; SSE2-LV-NEXT: movdqa %xmm0, %xmm3
; SSE2-LV-NEXT: pmuludq %xmm1, %xmm3
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3]
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSE2-LV-NEXT: pmuludq %xmm5, %xmm1
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,3,2,3]
; SSE2-LV-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; SSE2-LV-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
; SSE2-LV-NEXT: por %xmm4, %xmm3
; SSE2-LV-NEXT: pand %xmm2, %xmm0
; SSE2-LV-NEXT: pandn %xmm3, %xmm2
; SSE2-LV-NEXT: por %xmm2, %xmm0
; SSE2-LV-NEXT: retq
;
; SSE2-LIS-LABEL: combine_vec_rot_select_zero:
; SSE2-LIS: # %bb.0:
; SSE2-LIS-NEXT: movdqa %xmm0, %xmm2
; SSE2-LIS-NEXT: pxor %xmm0, %xmm0
; SSE2-LIS-NEXT: pcmpeqd %xmm1, %xmm0
; SSE2-LIS-NEXT: pslld $23, %xmm1
; SSE2-LIS-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE2-LIS-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE2-LIS-NEXT: cvttps2dq %xmm1, %xmm1
; SSE2-LIS-NEXT: movdqa %xmm2, %xmm3
; SSE2-LIS-NEXT: pmuludq %xmm1, %xmm3
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm5 = xmm2[1,1,3,3]
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSE2-LIS-NEXT: pmuludq %xmm5, %xmm1
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,3,2,3]
; SSE2-LIS-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; SSE2-LIS-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
; SSE2-LIS-NEXT: por %xmm4, %xmm3
; SSE2-LIS-NEXT: pand %xmm0, %xmm2
; SSE2-LIS-NEXT: pandn %xmm3, %xmm0
; SSE2-LIS-NEXT: por %xmm2, %xmm0
; SSE2-LIS-NEXT: retq
; SSE2-LABEL: combine_vec_rot_select_zero:
; SSE2: # %bb.0:
; SSE2-NEXT: pxor %xmm2, %xmm2
; SSE2-NEXT: pcmpeqd %xmm1, %xmm2
; SSE2-NEXT: pslld $23, %xmm1
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; SSE2-NEXT: cvttps2dq %xmm1, %xmm1
; SSE2-NEXT: movdqa %xmm0, %xmm3
; SSE2-NEXT: pmuludq %xmm1, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSE2-NEXT: pmuludq %xmm5, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,3,2,3]
; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
; SSE2-NEXT: por %xmm4, %xmm3
; SSE2-NEXT: pand %xmm2, %xmm0
; SSE2-NEXT: pandn %xmm3, %xmm2
; SSE2-NEXT: por %xmm2, %xmm0
; SSE2-NEXT: retq
;
; XOP-LABEL: combine_vec_rot_select_zero:
; XOP: # %bb.0:
Expand Down
3 changes: 1 addition & 2 deletions llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll
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Expand Up @@ -61,8 +61,7 @@ zero:
; CHECK: bb.4
; CHECK: bb.5
; CHECK: %3:gr64 = COPY %10
; CHECK-LV: %4:gr64 = COPY killed %10
; CHECK-LIS: %4:gr64 = COPY %10
; CHECK: %4:gr64 = COPY killed %10
; CHECK: %4:gr64 = nuw ADD64ri32 %4, 8, implicit-def dead $eflags
; CHECK: TEST64rr killed %1, %1, implicit-def $eflags
; CHECK: JCC_1 %bb.1, 5, implicit killed $eflags
Expand Down