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[MIRPrinter] Don't print space when there is no successor #80143

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Merged
merged 3 commits into from
Jan 31, 2024
Merged

[MIRPrinter] Don't print space when there is no successor #80143

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a52b3df
Pre-commit test cases
dianqk Jan 31, 2024
0ab38d2
[MIRPrinter] Don't print space when there is no successor
dianqk Jan 31, 2024
b04ef7a
fixup! [MIRPrinter] Don't print space when there is no successor
dianqk Jan 31, 2024
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4 changes: 3 additions & 1 deletion llvm/lib/CodeGen/MIRPrinter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -694,7 +694,9 @@ void MIPrinter::print(const MachineBasicBlock &MBB) {
// fallthrough.
if ((!MBB.succ_empty() && !SimplifyMIR) || !canPredictProbs ||
!canPredictSuccessors(MBB)) {
OS.indent(2) << "successors: ";
OS.indent(2) << "successors:";
if (!MBB.succ_empty())
OS << " ";
for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I) {
if (I != MBB.succ_begin())
OS << ", ";
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/AArch64/GlobalISel/uaddo-8-16-bits.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@ body: |
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.trap)
; CHECK-NEXT: {{ $}}
Expand Down Expand Up @@ -78,7 +78,7 @@ body: |
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.trap)
; CHECK-NEXT: {{ $}}
Expand Down Expand Up @@ -132,7 +132,7 @@ body: |
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.trap)
; CHECK-NEXT: {{ $}}
Expand Down Expand Up @@ -204,7 +204,7 @@ body: |
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.trap)
; CHECK-NEXT: {{ $}}
Expand Down Expand Up @@ -259,7 +259,7 @@ body: |
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.trap)
; CHECK-NEXT: {{ $}}
Expand Down Expand Up @@ -315,7 +315,7 @@ body: |
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.trap)
; CHECK-NEXT: {{ $}}
Expand Down Expand Up @@ -375,7 +375,7 @@ body: |
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.trap)
; CHECK-NEXT: {{ $}}
Expand Down Expand Up @@ -510,7 +510,7 @@ body: |
; CHECK-NEXT: G_BR %bb.3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.trap)
; CHECK-NEXT: {{ $}}
Expand Down Expand Up @@ -575,7 +575,7 @@ body: |
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.trap)
; CHECK-NEXT: {{ $}}
Expand Down Expand Up @@ -632,7 +632,7 @@ body: |
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.trap)
; CHECK-NEXT: {{ $}}
Expand Down Expand Up @@ -690,7 +690,7 @@ body: |
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.trap)
; CHECK-NEXT: {{ $}}
Expand Down Expand Up @@ -781,7 +781,7 @@ body: |
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.trap)
; CHECK-NEXT: {{ $}}
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -416,15 +416,15 @@ body: |
; CHECK-NEXT: B %bb.14
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.14.bb86:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: $w0 = MOVi32imm 10
; CHECK-NEXT: STATEPOINT 2882400000, 0, 1, @blam, $w0, 2, 0, 2, 0, 2, 41, 2, 0, 2, 1, 2, 0, 2, 237, 2, 3, 2, 14, 2, 0, 2, 0, 2, 0, 2, 3, 2, 4278124286, 2, 3, 2, 4278124286, 2, 0, 2, 0, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 7, 2, 0, 2, 7, 2, 4278124286, 2, 0, 2, 0, 2, 7, 2, 0, 2, 1, 2, 0, 2, 0, 2, 1, 0, 0, csr_aarch64_aapcs, implicit-def $sp, implicit-def dead early-clobber $lr
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.15.bb90:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: liveins: $fp, $w21, $x10
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
Expand All @@ -434,7 +434,7 @@ body: |
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.16.bb94:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: $w0 = MOVi32imm 10
Expand Down
16 changes: 7 additions & 9 deletions llvm/test/CodeGen/AArch64/tail-dup-redundant-phi.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -84,10 +84,8 @@

declare i8 addrspace(1)* @bar(i8 addrspace(1)*)

; Function Attrs: nounwind readnone
declare i8 addrspace(1)* @llvm.experimental.gc.relocate.p1i8(token, i32 immarg, i32 immarg) #0

; Function Attrs: nounwind readnone
declare i8 addrspace(1)* @llvm.experimental.gc.result.p1i8(token) #0

declare void @wombat(i32)
Expand Down Expand Up @@ -199,7 +197,7 @@ body: |
; CHECK-NEXT: B %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.bb1:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 10
Expand All @@ -208,7 +206,7 @@ body: |
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3.bb2:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: [[MOVi32imm1:%[0-9]+]]:gpr32 = MOVi32imm 10
Expand Down Expand Up @@ -289,7 +287,7 @@ body: |
; CHECK-NEXT: B %bb.14
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.10.bb31:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: [[MOVi32imm2:%[0-9]+]]:gpr32 = MOVi32imm 10
Expand All @@ -298,11 +296,11 @@ body: |
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.11.bb35:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.13.bb40:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: [[MOVi32imm3:%[0-9]+]]:gpr32 = MOVi32imm 10
Expand All @@ -327,7 +325,7 @@ body: |
; CHECK-NEXT: B %bb.16
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.16.bb47:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: [[MOVi32imm4:%[0-9]+]]:gpr32 = MOVi32imm 14
Expand All @@ -336,7 +334,7 @@ body: |
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.17.bb49:
; CHECK-NEXT: successors:{{ $}}
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
; CHECK-NEXT: [[MOVi32imm5:%[0-9]+]]:gpr32 = MOVi32imm 10
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap.mir
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Expand Up @@ -15,7 +15,7 @@ body: |
; GCN-NEXT: S_CBRANCH_EXECNZ %bb.2, implicit $exec
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.1:
; GCN-NEXT: successors: {{$}}
; GCN-NEXT: successors:
; GCN-NEXT: {{ $}}
; GCN-NEXT: G_STORE [[C]](s32), [[C1]](p1) :: (store (s8), addrspace 1)
; GCN-NEXT: {{ $}}
Expand Down Expand Up @@ -47,7 +47,7 @@ body: |
; GCN-NEXT: [[C1:%[0-9]+]]:_(p1) = G_CONSTANT i64 0
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.1:
; GCN-NEXT: successors: {{$}}
; GCN-NEXT: successors:
; GCN-NEXT: {{ $}}
; GCN-NEXT: G_STORE [[C]](s32), [[C1]](p1) :: (store (s8), addrspace 1)
; GCN-NEXT: {{ $}}
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/constant-island-movwt.mir
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Expand Up @@ -893,7 +893,7 @@ body: |
# CHECK-NEXT: t2B %bb.2, 14 /* CC::al */, $noreg
# CHECK-NEXT: {{^ $}}
# CHECK-NEXT: bb.1 (align 4):
# CHECK-NEXT: successors:{{ }}
# CHECK-NEXT: successors:
# CHECK-NEXT: {{^ $}}
# CHECK-NEXT: CONSTPOOL_ENTRY 1, %const.0, 4
# CHECK-NEXT: {{^ $}}
Expand Down
18 changes: 18 additions & 0 deletions llvm/test/CodeGen/MIR/X86/unreachable-block-print.mir
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@@ -0,0 +1,18 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
# RUN: llc -mtriple=x86_64-- -o - %s -run-pass=none -verify-machineinstrs -simplify-mir | FileCheck %s
---
name: foo
body: |
; CHECK-LABEL: name: foo
; CHECK: bb.0:
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: RET 0, $eax
bb.0:
successors:

bb.1:
RET 0, $eax
...
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