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Merged
merged 11 commits into from
Mar 27, 2024
Merged

Fix stack layout for frames larger than 2gb #84114

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e7db86b
[nfc] Add x86 test case for huge stacks
wesleywiser Mar 5, 2024
3927a49
Fix stack layout for frames larger than 2gb
wesleywiser Mar 6, 2024
06335cf
Review feedback: use explicit bitwidth types
wesleywiser Mar 7, 2024
36f9869
Placate msvc
wesleywiser Mar 7, 2024
1ddc600
Review feedback: use integer constant function macros
wesleywiser Mar 7, 2024
529c2f4
Attempt to fix msvc build
wesleywiser Mar 7, 2024
1f7acc3
Review feedback: use opaque ptrs
wesleywiser Mar 8, 2024
cdee65e
Review feedback: autogenerate test
wesleywiser Mar 8, 2024
ad6283b
Review feedback: long -> int64_t
wesleywiser Mar 9, 2024
ac400f8
Use std::abs instead
wesleywiser Mar 17, 2024
d395ab4
Add --no_x86_scrub_sp to test
wesleywiser Mar 22, 2024
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14 changes: 7 additions & 7 deletions llvm/include/llvm/CodeGen/MachineFrameInfo.h
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Expand Up @@ -251,7 +251,7 @@ class MachineFrameInfo {
/// targets, this value is only used when generating debug info (via
/// TargetRegisterInfo::getFrameIndexReference); when generating code, the
/// corresponding adjustments are performed directly.
int OffsetAdjustment = 0;
int64_t OffsetAdjustment = 0;

/// The prolog/epilog code inserter may process objects that require greater
/// alignment than the default alignment the target provides.
Expand Down Expand Up @@ -280,7 +280,7 @@ class MachineFrameInfo {
/// setup/destroy pseudo instructions (as defined in the TargetFrameInfo
/// class). This information is important for frame pointer elimination.
/// It is only valid during and after prolog/epilog code insertion.
unsigned MaxCallFrameSize = ~0u;
uint64_t MaxCallFrameSize = ~UINT64_C(0);

/// The number of bytes of callee saved registers that the target wants to
/// report for the current function in the CodeView S_FRAMEPROC record.
Expand Down Expand Up @@ -591,10 +591,10 @@ class MachineFrameInfo {
uint64_t estimateStackSize(const MachineFunction &MF) const;

/// Return the correction for frame offsets.
int getOffsetAdjustment() const { return OffsetAdjustment; }
int64_t getOffsetAdjustment() const { return OffsetAdjustment; }

/// Set the correction for frame offsets.
void setOffsetAdjustment(int Adj) { OffsetAdjustment = Adj; }
void setOffsetAdjustment(int64_t Adj) { OffsetAdjustment = Adj; }

/// Return the alignment in bytes that this function must be aligned to,
/// which is greater than the default stack alignment provided by the target.
Expand Down Expand Up @@ -655,17 +655,17 @@ class MachineFrameInfo {
/// CallFrameSetup/Destroy pseudo instructions are used by the target, and
/// then only during or after prolog/epilog code insertion.
///
unsigned getMaxCallFrameSize() const {
uint64_t getMaxCallFrameSize() const {
// TODO: Enable this assert when targets are fixed.
//assert(isMaxCallFrameSizeComputed() && "MaxCallFrameSize not computed yet");
if (!isMaxCallFrameSizeComputed())
return 0;
return MaxCallFrameSize;
}
bool isMaxCallFrameSizeComputed() const {
return MaxCallFrameSize != ~0u;
return MaxCallFrameSize != ~UINT64_C(0);
}
void setMaxCallFrameSize(unsigned S) { MaxCallFrameSize = S; }
void setMaxCallFrameSize(uint64_t S) { MaxCallFrameSize = S; }

/// Returns how many bytes of callee-saved registers the target pushed in the
/// prologue. Only used for debug info.
Expand Down
4 changes: 2 additions & 2 deletions llvm/include/llvm/CodeGen/TargetFrameLowering.h
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Expand Up @@ -51,7 +51,7 @@ class TargetFrameLowering {
// Maps a callee saved register to a stack slot with a fixed offset.
struct SpillSlot {
unsigned Reg;
int Offset; // Offset relative to stack pointer on function entry.
int64_t Offset; // Offset relative to stack pointer on function entry.
};

struct DwarfFrameBase {
Expand All @@ -66,7 +66,7 @@ class TargetFrameLowering {
// Used with FrameBaseKind::Register.
unsigned Reg;
// Used with FrameBaseKind::CFA.
int Offset;
int64_t Offset;
struct WasmFrameBase WasmLoc;
} Location;
};
Expand Down
2 changes: 1 addition & 1 deletion llvm/include/llvm/MC/MCAsmBackend.h
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Expand Up @@ -232,7 +232,7 @@ class MCAsmBackend {
virtual void handleAssemblerFlag(MCAssemblerFlag Flag) {}

/// Generate the compact unwind encoding for the CFI instructions.
virtual uint32_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
virtual uint64_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
const MCContext *Ctxt) const {
return 0;
}
Expand Down
40 changes: 20 additions & 20 deletions llvm/include/llvm/MC/MCDwarf.h
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Expand Up @@ -508,15 +508,15 @@ class MCCFIInstruction {
MCSymbol *Label;
unsigned Register;
union {
int Offset;
int64_t Offset;
unsigned Register2;
};
unsigned AddressSpace = ~0u;
SMLoc Loc;
std::vector<char> Values;
std::string Comment;

MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int O, SMLoc Loc,
MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int64_t O, SMLoc Loc,
StringRef V = "", StringRef Comment = "")
: Operation(Op), Label(L), Register(R), Offset(O), Loc(Loc),
Values(V.begin(), V.end()), Comment(Comment) {
Expand All @@ -528,7 +528,7 @@ class MCCFIInstruction {
assert(Op == OpRegister);
}

MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int O, unsigned AS,
MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int64_t O, unsigned AS,
SMLoc Loc)
: Operation(Op), Label(L), Register(R), Offset(O), AddressSpace(AS),
Loc(Loc) {
Expand All @@ -538,30 +538,30 @@ class MCCFIInstruction {
public:
/// .cfi_def_cfa defines a rule for computing CFA as: take address from
/// Register and add Offset to it.
static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int Offset,
SMLoc Loc = {}) {
static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register,
int64_t Offset, SMLoc Loc = {}) {
return MCCFIInstruction(OpDefCfa, L, Register, Offset, Loc);
}

/// .cfi_def_cfa_register modifies a rule for computing CFA. From now
/// on Register will be used instead of the old one. Offset remains the same.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
return MCCFIInstruction(OpDefCfaRegister, L, Register, 0, Loc);
return MCCFIInstruction(OpDefCfaRegister, L, Register, INT64_C(0), Loc);
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INT64_C(0) is not necessary. 0 is fairly common for int64_t.

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@wesleywiser Please can you fix those cases before I commit.

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Without the explicit cast, gcc complains the call is ambiguous:

/home/wesley/llvm-project2/llvm/include/llvm/MC/MCDwarf.h:550:66: error: call of overloaded ‘MCCFIInstruction(llvm::MCCFIInstruction::OpType, llvm::MCSymbol*&, unsigned int&, int, llvm::SMLoc&)’ is ambiguous
  550 |     return MCCFIInstruction(OpDefCfaRegister, L, Register, 0, Loc);
      |                                                                  ^
/home/wesley/llvm-project2/llvm/include/llvm/MC/MCDwarf.h:526:3: note: candidate: ‘llvm::MCCFIInstruction::MCCFIInstruction(llvm::MCCFIInstruction::OpType, llvm::MCSymbol*, unsigned int, unsigned int, llvm::SMLoc)’
  526 |   MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R1, unsigned R2, SMLoc Loc)
      |   ^~~~~~~~~~~~~~~~
/home/wesley/llvm-project2/llvm/include/llvm/MC/MCDwarf.h:519:3: note: candidate: ‘llvm::MCCFIInstruction::MCCFIInstruction(llvm::MCCFIInstruction::OpType, llvm::MCSymbol*, unsigned int, int64_t, llvm::SMLoc, llvm::StringRef, llvm::StringRef)’
  519 |   MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int64_t O, SMLoc Loc,
      |   ^~~~~~~~~~~~~~~~

Is there a different way I should solve that?

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OK, we can try to cleanup later

}

/// .cfi_def_cfa_offset modifies a rule for computing CFA. Register
/// remains the same, but offset is new. Note that it is the absolute offset
/// that will be added to a defined register to the compute CFA address.
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset,
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int64_t Offset,
SMLoc Loc = {}) {
return MCCFIInstruction(OpDefCfaOffset, L, 0, Offset, Loc);
}

/// .cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but
/// Offset is a relative value that is added/subtracted from the previous
/// offset.
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment,
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int64_t Adjustment,
SMLoc Loc = {}) {
return MCCFIInstruction(OpAdjustCfaOffset, L, 0, Adjustment, Loc);
}
Expand All @@ -581,15 +581,15 @@ class MCCFIInstruction {
/// .cfi_offset Previous value of Register is saved at offset Offset
/// from CFA.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register,
int Offset, SMLoc Loc = {}) {
int64_t Offset, SMLoc Loc = {}) {
return MCCFIInstruction(OpOffset, L, Register, Offset, Loc);
}

/// .cfi_rel_offset Previous value of Register is saved at offset
/// Offset from the current CFA register. This is transformed to .cfi_offset
/// using the known displacement of the CFA register from the CFA.
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register,
int Offset, SMLoc Loc = {}) {
int64_t Offset, SMLoc Loc = {}) {
return MCCFIInstruction(OpRelOffset, L, Register, Offset, Loc);
}

Expand All @@ -602,44 +602,44 @@ class MCCFIInstruction {

/// .cfi_window_save SPARC register window is saved.
static MCCFIInstruction createWindowSave(MCSymbol *L, SMLoc Loc = {}) {
return MCCFIInstruction(OpWindowSave, L, 0, 0, Loc);
return MCCFIInstruction(OpWindowSave, L, 0, INT64_C(0), Loc);
}

/// .cfi_negate_ra_state AArch64 negate RA state.
static MCCFIInstruction createNegateRAState(MCSymbol *L, SMLoc Loc = {}) {
return MCCFIInstruction(OpNegateRAState, L, 0, 0, Loc);
return MCCFIInstruction(OpNegateRAState, L, 0, INT64_C(0), Loc);
}

/// .cfi_restore says that the rule for Register is now the same as it
/// was at the beginning of the function, after all initial instructions added
/// by .cfi_startproc were executed.
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
return MCCFIInstruction(OpRestore, L, Register, 0, Loc);
return MCCFIInstruction(OpRestore, L, Register, INT64_C(0), Loc);
}

/// .cfi_undefined From now on the previous value of Register can't be
/// restored anymore.
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
return MCCFIInstruction(OpUndefined, L, Register, 0, Loc);
return MCCFIInstruction(OpUndefined, L, Register, INT64_C(0), Loc);
}

/// .cfi_same_value Current value of Register is the same as in the
/// previous frame. I.e., no restoration is needed.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
return MCCFIInstruction(OpSameValue, L, Register, 0, Loc);
return MCCFIInstruction(OpSameValue, L, Register, INT64_C(0), Loc);
}

/// .cfi_remember_state Save all current rules for all registers.
static MCCFIInstruction createRememberState(MCSymbol *L, SMLoc Loc = {}) {
return MCCFIInstruction(OpRememberState, L, 0, 0, Loc);
return MCCFIInstruction(OpRememberState, L, 0, INT64_C(0), Loc);
}

/// .cfi_restore_state Restore the previously saved state.
static MCCFIInstruction createRestoreState(MCSymbol *L, SMLoc Loc = {}) {
return MCCFIInstruction(OpRestoreState, L, 0, 0, Loc);
return MCCFIInstruction(OpRestoreState, L, 0, INT64_C(0), Loc);
}

/// .cfi_escape Allows the user to add arbitrary bytes to the unwind
Expand All @@ -650,7 +650,7 @@ class MCCFIInstruction {
}

/// A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE
static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int Size,
static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int64_t Size,
SMLoc Loc = {}) {
return MCCFIInstruction(OpGnuArgsSize, L, 0, Size, Loc);
}
Expand All @@ -677,7 +677,7 @@ class MCCFIInstruction {
return AddressSpace;
}

int getOffset() const {
int64_t getOffset() const {
assert(Operation == OpDefCfa || Operation == OpOffset ||
Operation == OpRelOffset || Operation == OpDefCfaOffset ||
Operation == OpAdjustCfaOffset || Operation == OpGnuArgsSize ||
Expand Down Expand Up @@ -705,7 +705,7 @@ struct MCDwarfFrameInfo {
unsigned CurrentCfaRegister = 0;
unsigned PersonalityEncoding = 0;
unsigned LsdaEncoding = 0;
uint32_t CompactUnwindEncoding = 0;
uint64_t CompactUnwindEncoding = 0;
bool IsSignalFrame = false;
bool IsSimple = false;
unsigned RAReg = static_cast<unsigned>(INT_MAX);
Expand Down
10 changes: 5 additions & 5 deletions llvm/lib/CodeGen/CFIInstrInserter.cpp
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Expand Up @@ -68,9 +68,9 @@ class CFIInstrInserter : public MachineFunctionPass {
struct MBBCFAInfo {
MachineBasicBlock *MBB;
/// Value of cfa offset valid at basic block entry.
int IncomingCFAOffset = -1;
int64_t IncomingCFAOffset = -1;
/// Value of cfa offset valid at basic block exit.
int OutgoingCFAOffset = -1;
int64_t OutgoingCFAOffset = -1;
/// Value of cfa register valid at basic block entry.
unsigned IncomingCFARegister = 0;
/// Value of cfa register valid at basic block exit.
Expand Down Expand Up @@ -120,7 +120,7 @@ class CFIInstrInserter : public MachineFunctionPass {
/// Return the cfa offset value that should be set at the beginning of a MBB
/// if needed. The negated value is needed when creating CFI instructions that
/// set absolute offset.
int getCorrectCFAOffset(MachineBasicBlock *MBB) {
int64_t getCorrectCFAOffset(MachineBasicBlock *MBB) {
return MBBVector[MBB->getNumber()].IncomingCFAOffset;
}

Expand Down Expand Up @@ -175,7 +175,7 @@ void CFIInstrInserter::calculateCFAInfo(MachineFunction &MF) {

void CFIInstrInserter::calculateOutgoingCFAInfo(MBBCFAInfo &MBBInfo) {
// Outgoing cfa offset set by the block.
int SetOffset = MBBInfo.IncomingCFAOffset;
int64_t SetOffset = MBBInfo.IncomingCFAOffset;
// Outgoing cfa register set by the block.
unsigned SetRegister = MBBInfo.IncomingCFARegister;
MachineFunction *MF = MBBInfo.MBB->getParent();
Expand All @@ -188,7 +188,7 @@ void CFIInstrInserter::calculateOutgoingCFAInfo(MBBCFAInfo &MBBInfo) {
for (MachineInstr &MI : *MBBInfo.MBB) {
if (MI.isCFIInstruction()) {
std::optional<unsigned> CSRReg;
std::optional<int> CSROffset;
std::optional<int64_t> CSROffset;
unsigned CFIIndex = MI.getOperand(0).getCFIIndex();
const MCCFIInstruction &CFI = Instrs[CFIIndex];
switch (CFI.getOperation()) {
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/CodeGen/MachineFrameInfo.cpp
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Expand Up @@ -197,7 +197,7 @@ void MachineFrameInfo::computeMaxCallFrameSize(
for (MachineInstr &MI : MBB) {
unsigned Opcode = MI.getOpcode();
if (Opcode == FrameSetupOpcode || Opcode == FrameDestroyOpcode) {
unsigned Size = TII.getFrameSize(MI);
uint64_t Size = TII.getFrameSize(MI);
MaxCallFrameSize = std::max(MaxCallFrameSize, Size);
if (FrameSDOps != nullptr)
FrameSDOps->push_back(&MI);
Expand Down
4 changes: 2 additions & 2 deletions llvm/lib/CodeGen/PrologEpilogInserter.cpp
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Expand Up @@ -366,8 +366,8 @@ void PEI::calculateCallFrameInfo(MachineFunction &MF) {
return;

// (Re-)Compute the MaxCallFrameSize.
[[maybe_unused]] uint32_t MaxCFSIn =
MFI.isMaxCallFrameSizeComputed() ? MFI.getMaxCallFrameSize() : UINT32_MAX;
[[maybe_unused]] uint64_t MaxCFSIn =
MFI.isMaxCallFrameSizeComputed() ? MFI.getMaxCallFrameSize() : UINT64_MAX;
std::vector<MachineBasicBlock::iterator> FrameSDOps;
MFI.computeMaxCallFrameSize(MF, &FrameSDOps);
assert(MFI.getMaxCallFrameSize() <= MaxCFSIn &&
Expand Down
6 changes: 3 additions & 3 deletions llvm/lib/MC/MCDwarf.cpp
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Expand Up @@ -1293,8 +1293,8 @@ static void EmitPersonality(MCStreamer &streamer, const MCSymbol &symbol,
namespace {

class FrameEmitterImpl {
int CFAOffset = 0;
int InitialCFAOffset = 0;
int64_t CFAOffset = 0;
int64_t InitialCFAOffset = 0;
bool IsEH;
MCObjectStreamer &Streamer;

Expand Down Expand Up @@ -1408,7 +1408,7 @@ void FrameEmitterImpl::emitCFIInstruction(const MCCFIInstruction &Instr) {
if (!IsEH)
Reg = MRI->getDwarfRegNumFromDwarfEHRegNum(Reg);

int Offset = Instr.getOffset();
int64_t Offset = Instr.getOffset();
if (IsRelative)
Offset -= CFAOffset;
Offset = Offset / dataAlignmentFactor;
Expand Down
10 changes: 5 additions & 5 deletions llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
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Expand Up @@ -584,7 +584,7 @@ class DarwinAArch64AsmBackend : public AArch64AsmBackend {
/// Encode compact unwind stack adjustment for frameless functions.
/// See UNWIND_ARM64_FRAMELESS_STACK_SIZE_MASK in compact_unwind_encoding.h.
/// The stack size always needs to be 16 byte aligned.
uint32_t encodeStackAdjustment(uint32_t StackSize) const {
uint64_t encodeStackAdjustment(uint64_t StackSize) const {
return (StackSize / 16) << 12;
}

Expand All @@ -602,7 +602,7 @@ class DarwinAArch64AsmBackend : public AArch64AsmBackend {
}

/// Generate the compact unwind encoding from the CFI directives.
uint32_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
uint64_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
const MCContext *Ctxt) const override {
ArrayRef<MCCFIInstruction> Instrs = FI->Instructions;
if (Instrs.empty())
Expand All @@ -612,10 +612,10 @@ class DarwinAArch64AsmBackend : public AArch64AsmBackend {
return CU::UNWIND_ARM64_MODE_DWARF;

bool HasFP = false;
unsigned StackSize = 0;
uint64_t StackSize = 0;

uint32_t CompactUnwindEncoding = 0;
int CurOffset = 0;
uint64_t CompactUnwindEncoding = 0;
int64_t CurOffset = 0;
for (size_t i = 0, e = Instrs.size(); i != e; ++i) {
const MCCFIInstruction &Inst = Instrs[i];

Expand Down
4 changes: 2 additions & 2 deletions llvm/lib/Target/ARM/ARMFrameLowering.cpp
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Expand Up @@ -1165,7 +1165,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
if (STI.splitFramePushPop(MF)) {
unsigned DwarfReg = MRI->getDwarfRegNum(
Reg == ARM::R12 ? ARM::RA_AUTH_CODE : Reg, true);
unsigned Offset = MFI.getObjectOffset(FI);
uint64_t Offset = MFI.getObjectOffset(FI);
unsigned CFIIndex = MF.addFrameInst(
MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
Expand All @@ -1187,7 +1187,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
if ((Reg >= ARM::D0 && Reg <= ARM::D31) &&
(Reg < ARM::D8 || Reg >= ARM::D8 + AFI->getNumAlignedDPRCS2Regs())) {
unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
unsigned Offset = MFI.getObjectOffset(FI);
uint64_t Offset = MFI.getObjectOffset(FI);
unsigned CFIIndex = MF.addFrameInst(
MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
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Expand Up @@ -1148,7 +1148,7 @@ enum CompactUnwindEncodings {
/// instructions. If the CFI instructions describe a frame that cannot be
/// encoded in compact unwind, the method returns UNWIND_ARM_MODE_DWARF which
/// tells the runtime to fallback and unwind using dwarf.
uint32_t ARMAsmBackendDarwin::generateCompactUnwindEncoding(
uint64_t ARMAsmBackendDarwin::generateCompactUnwindEncoding(
const MCDwarfFrameInfo *FI, const MCContext *Ctxt) const {
DEBUG_WITH_TYPE("compact-unwind", llvm::dbgs() << "generateCU()\n");
// Only armv7k uses CFI based unwinding.
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h
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Expand Up @@ -34,7 +34,7 @@ class ARMAsmBackendDarwin : public ARMAsmBackend {
/*Is64Bit=*/false, cantFail(MachO::getCPUType(TT)), Subtype);
}

uint32_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
uint64_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
const MCContext *Ctxt) const override;
};
} // end namespace llvm
Expand Down
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