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[AArch64][SelectionDAG] Mask for SUBS with multiple users cannot be elided #90911

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Merged
merged 1 commit into from
May 5, 2024
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[AArch64][SelectionDAG] Mask for SUBS with multiple users cannot be elided #90911

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3 changes: 2 additions & 1 deletion llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -22833,7 +22833,8 @@ SDValue performCONDCombine(SDNode *N,
SDNode *SubsNode = N->getOperand(CmpIndex).getNode();
unsigned CondOpcode = SubsNode->getOpcode();

if (CondOpcode != AArch64ISD::SUBS || SubsNode->hasAnyUseOfValue(0))
if (CondOpcode != AArch64ISD::SUBS || SubsNode->hasAnyUseOfValue(0) ||
!SubsNode->hasOneUse())
return SDValue();

// There is a SUBS feeding this condition. Is it fed by a mask we can
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22 changes: 22 additions & 0 deletions llvm/test/CodeGen/AArch64/and-mask-removal.ll
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Expand Up @@ -526,4 +526,26 @@ define i64 @pr58109b(i8 signext %0, i64 %a, i64 %b) {
ret i64 %4
}

define i64 @test_2_selects(i8 zeroext %a) {
; CHECK-LABEL: test_2_selects:
; CHECK: ; %bb.0:
; CHECK-NEXT: add w9, w0, #24
; CHECK-NEXT: mov w8, #131
; CHECK-NEXT: and w9, w9, #0xff
; CHECK-NEXT: cmp w9, #81
; CHECK-NEXT: mov w9, #57
; CHECK-NEXT: csel x8, x8, xzr, lo
; CHECK-NEXT: csel x9, xzr, x9, eq
; CHECK-NEXT: add x0, x8, x9
; CHECK-NEXT: ret
%1 = add i8 %a, 24
%2 = zext i8 %1 to i64
%3 = icmp ult i8 %1, 81
%4 = select i1 %3, i64 131, i64 0
%5 = icmp eq i8 %1, 81
%6 = select i1 %5, i64 0, i64 57
%7 = add i64 %4, %6
ret i64 %7
}

declare i8 @llvm.usub.sat.i8(i8, i8) #0
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