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[GlobalIsel][AArch64] fix out of range access in regbankselect #92072

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Merged
merged 2 commits into from
May 14, 2024
Merged

[GlobalIsel][AArch64] fix out of range access in regbankselect #92072

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c309616
[GlobalIsel][AArch64] fix out of range access in regbankselect
tschuett May 14, 2024
97b2de8
address review comments
tschuett May 14, 2024
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5 changes: 4 additions & 1 deletion llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -600,8 +600,11 @@ bool AArch64RegisterBankInfo::isLoadFromFPType(const MachineInstr &MI) const {
EltTy = GV->getValueType();
// Look at the first element of the struct to determine the type we are
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Suggested change
// Look at the first element of the struct to determine the type we are
// Look at the first valid element of the struct to determine the type we are

It seems we should also update the comment.

// loading
while (StructType *StructEltTy = dyn_cast<StructType>(EltTy))
while (StructType *StructEltTy = dyn_cast<StructType>(EltTy)) {
if (StructEltTy->getNumElements() == 0)
break;
EltTy = StructEltTy->getTypeAtIndex(0U);
}
// Look at the first element of the array to determine its type
if (isa<ArrayType>(EltTy))
EltTy = EltTy->getArrayElementType();
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21 changes: 21 additions & 0 deletions llvm/test/CodeGen/AArch64/pr92062.ll
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@@ -0,0 +1,21 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -mtriple=aarch64 -O0 -global-isel %s -o - 2>&1 | FileCheck %s

target triple = "arm64"

@p = external global { {}, { ptr } }

define void @foo() {
; CHECK-LABEL: foo:
; CHECK: // %bb.0: // %bb
; CHECK-NEXT: adrp x8, :got:p
; CHECK-NEXT: ldr x8, [x8, :got_lo12:p]
; CHECK-NEXT: ldr x8, [x8]
; CHECK-NEXT: mov x9, xzr
; CHECK-NEXT: str x8, [x9]
; CHECK-NEXT: ret
bb:
%i1 = load ptr, ptr @p, align 8
store ptr %i1, ptr null, align 8
ret void
}
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