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Merged
merged 5 commits into from
Sep 4, 2024
Merged

[AArch64][NEON] Add intrinsics for LUTI #96883

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cb2ebe2
[AArch64][NEON] Add intrinsics for LUTI
Lukacma Jun 27, 2024
9e59cb5
Cleaned up patterns for the instruction
Lukacma Jun 28, 2024
ce9bbe8
Merge branch 'main' into luti-intriniscs
Lukacma Jun 28, 2024
47aed9f
Fixed backend errors and added additional intriniscs
Lukacma Jul 12, 2024
92d534c
Merge branch 'main' into luti-intriniscs
Lukacma Sep 3, 2024
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19 changes: 19 additions & 0 deletions clang/include/clang/Basic/arm_neon.td
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Original file line number Diff line number Diff line change
Expand Up @@ -2096,3 +2096,22 @@ let ArchGuard = "defined(__aarch64__) || defined(__arm64ec__)", TargetGuard = "r
def VLDAP1_LANE : WInst<"vldap1_lane", ".(c*!).I", "QUlQlUlldQdPlQPl">;
def VSTL1_LANE : WInst<"vstl1_lane", "v*(.!)I", "QUlQlUlldQdPlQPl">;
}

// Lookup table read with 2-bit/4-bit indices
let ArchGuard = "defined(__aarch64__)", TargetGuard = "lut" in {
def VLUTI2_B : SInst<"vluti2_lane", "Q.(qU)I", "cUcPcQcQUcQPc">;
def VLUTI2_B_Q : SInst<"vluti2_laneq", "Q.(QU)I", "cUcPcQcQUcQPc">;
def VLUTI2_H : SInst<"vluti2_lane", "Q.(<qU)I", "sUsPshQsQUsQPsQh">;
def VLUTI2_H_Q : SInst<"vluti2_laneq", "Q.(<QU)I", "sUsPshQsQUsQPsQh">;
def VLUTI4_B : SInst<"vluti4_lane", "..(qU)I", "QcQUcQPc">;
def VLUTI4_B_Q : SInst<"vluti4_laneq", "..UI", "QcQUcQPc">;
def VLUTI4_H_X2 : SInst<"vluti4_lane_x2", ".2(<qU)I", "QsQUsQPsQh">;
def VLUTI4_H_X2_Q : SInst<"vluti4_laneq_x2", ".2(<U)I", "QsQUsQPsQh">;

let ArchGuard = "defined(__aarch64__)", TargetGuard= "lut,bf16" in {
def VLUTI2_BF : SInst<"vluti2_lane", "Q.(<qU)I", "bQb">;
def VLUTI2_BF_Q : SInst<"vluti2_laneq", "Q.(<QU)I", "bQb">;
def VLUTI4_BF_X2 : SInst<"vluti4_lane_x2", ".2(<qU)I", "Qb">;
def VLUTI4_BF_X2_Q : SInst<"vluti4_laneq_x2", ".2(<U)I", "Qb">;
}
}
89 changes: 89 additions & 0 deletions clang/lib/CodeGen/CGBuiltin.cpp
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Expand Up @@ -13481,6 +13481,95 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
Int = Intrinsic::aarch64_neon_suqadd;
return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vuqadd");
}

case NEON::BI__builtin_neon_vluti2_laneq_bf16:
case NEON::BI__builtin_neon_vluti2_laneq_f16:
case NEON::BI__builtin_neon_vluti2_laneq_p16:
case NEON::BI__builtin_neon_vluti2_laneq_p8:
case NEON::BI__builtin_neon_vluti2_laneq_s16:
case NEON::BI__builtin_neon_vluti2_laneq_s8:
case NEON::BI__builtin_neon_vluti2_laneq_u16:
case NEON::BI__builtin_neon_vluti2_laneq_u8: {
Int = Intrinsic::aarch64_neon_vluti2_laneq;
llvm::Type *Tys[2];
Tys[0] = Ty;
Tys[1] = GetNeonType(this, NeonTypeFlags(Type.getEltType(), false,
/*isQuad*/ false));
return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vluti2_laneq");
}
case NEON::BI__builtin_neon_vluti2q_laneq_bf16:
case NEON::BI__builtin_neon_vluti2q_laneq_f16:
case NEON::BI__builtin_neon_vluti2q_laneq_p16:
case NEON::BI__builtin_neon_vluti2q_laneq_p8:
case NEON::BI__builtin_neon_vluti2q_laneq_s16:
case NEON::BI__builtin_neon_vluti2q_laneq_s8:
case NEON::BI__builtin_neon_vluti2q_laneq_u16:
case NEON::BI__builtin_neon_vluti2q_laneq_u8: {
Int = Intrinsic::aarch64_neon_vluti2_laneq;
llvm::Type *Tys[2];
Tys[0] = Ty;
Tys[1] = GetNeonType(this, NeonTypeFlags(Type.getEltType(), false,
/*isQuad*/ true));
return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vluti2_laneq");
}
case NEON::BI__builtin_neon_vluti2_lane_bf16:
case NEON::BI__builtin_neon_vluti2_lane_f16:
case NEON::BI__builtin_neon_vluti2_lane_p16:
case NEON::BI__builtin_neon_vluti2_lane_p8:
case NEON::BI__builtin_neon_vluti2_lane_s16:
case NEON::BI__builtin_neon_vluti2_lane_s8:
case NEON::BI__builtin_neon_vluti2_lane_u16:
case NEON::BI__builtin_neon_vluti2_lane_u8: {
Int = Intrinsic::aarch64_neon_vluti2_lane;
llvm::Type *Tys[2];
Tys[0] = Ty;
Tys[1] = GetNeonType(this, NeonTypeFlags(Type.getEltType(), false,
/*isQuad*/ false));
return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vluti2_lane");
}
case NEON::BI__builtin_neon_vluti2q_lane_bf16:
case NEON::BI__builtin_neon_vluti2q_lane_f16:
case NEON::BI__builtin_neon_vluti2q_lane_p16:
case NEON::BI__builtin_neon_vluti2q_lane_p8:
case NEON::BI__builtin_neon_vluti2q_lane_s16:
case NEON::BI__builtin_neon_vluti2q_lane_s8:
case NEON::BI__builtin_neon_vluti2q_lane_u16:
case NEON::BI__builtin_neon_vluti2q_lane_u8: {
Int = Intrinsic::aarch64_neon_vluti2_lane;
llvm::Type *Tys[2];
Tys[0] = Ty;
Tys[1] = GetNeonType(this, NeonTypeFlags(Type.getEltType(), false,
/*isQuad*/ true));
return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vluti2_lane");
}
case NEON::BI__builtin_neon_vluti4q_lane_p8:
case NEON::BI__builtin_neon_vluti4q_lane_s8:
case NEON::BI__builtin_neon_vluti4q_lane_u8: {
Int = Intrinsic::aarch64_neon_vluti4q_lane;
return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vluti4q_lane");
}
case NEON::BI__builtin_neon_vluti4q_laneq_p8:
case NEON::BI__builtin_neon_vluti4q_laneq_s8:
case NEON::BI__builtin_neon_vluti4q_laneq_u8: {
Int = Intrinsic::aarch64_neon_vluti4q_laneq;
return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vluti4q_laneq");
}
case NEON::BI__builtin_neon_vluti4q_lane_bf16_x2:
case NEON::BI__builtin_neon_vluti4q_lane_f16_x2:
case NEON::BI__builtin_neon_vluti4q_lane_p16_x2:
case NEON::BI__builtin_neon_vluti4q_lane_s16_x2:
case NEON::BI__builtin_neon_vluti4q_lane_u16_x2: {
Int = Intrinsic::aarch64_neon_vluti4q_lane_x2;
return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vluti4q_lane_x2");
}
case NEON::BI__builtin_neon_vluti4q_laneq_bf16_x2:
case NEON::BI__builtin_neon_vluti4q_laneq_f16_x2:
case NEON::BI__builtin_neon_vluti4q_laneq_p16_x2:
case NEON::BI__builtin_neon_vluti4q_laneq_s16_x2:
case NEON::BI__builtin_neon_vluti4q_laneq_u16_x2: {
Int = Intrinsic::aarch64_neon_vluti4q_laneq_x2;
return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vluti4q_laneq_x2");
}
}
}

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