Add float to int conversion directives, some misc changes #3847

zimri-leisher · 2025-07-04T05:35:12Z


*Related Issue(s)*	#3846
*Has Unit Tests (y/n)*	y
*Documentation Included (y/n)*	n

Change Description

Adds the FPTOI (floating point to integer) and ITOFP directives, which take 64 bit ints and floats and convert between them as if by static cast.
I also added a small amount of debugging telemetry to certain deserialization/file read errors. This was helpful to me for debugging problems and I think would be helpful to users too.
I also updated the default register count to 128. This equates to 1024 bytes of memory used for registers. Without lots of registers, many sequences do not run, because currently I do not perform any register allocation optimization. In the next large Fpy update I will remove the concept of statically allocated registers and replace them with a stack, so this constant will go away. For now, in order to be usable out of the box, the register count needs to be high.
I also fixed a bug in the NOT directive. Previously, it was implemented to take the bitwise complement of whatever was given to it. However, this produced incorrect behavior when trying to get the inverse of the Fprime "TRUE" value (0xFF == 255), as it would result in -256 (0xFFFFFFFFFFFFFF00). Now, it interprets the input register as a C++ boolean, and if true it outputs static_cast<I64>(false), otherwise true. This gives the correct behavior under all situations.

Rationale

This will allow users of Fpy to compare and perform math where one operand is a float and the other is an int. Otherwise, you wouldn't be able to check if 5.0 > 4.

Svc/FpySequencer/FpySequencerDirectives.cpp

+    return res;
+}
+
+Signal FpySequencer::unaryRegOp_directiveHandler(const FpySequencer_UnaryRegOpDirective& directive,


Svc/FpySequencer/FpySequencer.hpp

zimri-leisher · 2025-07-04T21:56:20Z

Svc/FpySequencer/FpySequencerValidationState.cpp

-        this->log_WARNING_HI_FileReadDeserializeError(this->m_sequenceFilePath, static_cast<I32>(deserStatus),
-                                                      this->m_sequenceBuffer.getBuffLeft(),
-                                                      this->m_sequenceBuffer.getBuffLength());
+        this->log_WARNING_HI_FileReadDeserializeError(


just added the filereadstage to these events

Svc/FpySequencer/FpySequencerValidationState.cpp

    }

-    readStatus = readBytes(sequenceFile, this->m_sequenceObj.getheader().getbodySize());
+    readStatus =


Svc/FpySequencer/FpySequencerValidationState.cpp


    // read footer bytes but don't include in CRC
-    readStatus = this->readBytes(sequenceFile, Fpy::Footer::SERIALIZED_SIZE, false);
+    readStatus = this->readBytes(sequenceFile, Fpy::Footer::SERIALIZED_SIZE, FpySequencer_FileReadStage::FOOTER, false);


Svc/FpySequencer/FpySequencerValidationState.cpp


    if (fileStatus != Os::File::OP_OK) {
-        this->log_WARNING_HI_FileReadError(this->m_sequenceFilePath, static_cast<I32>(fileStatus));
+        this->log_WARNING_HI_FileReadError(readStage, this->m_sequenceFilePath, static_cast<I32>(fileStatus));


Svc/FpySequencer/FpySequencerValidationState.cpp


    if (actualReadLen < expectedReadLen) {
-        this->log_WARNING_HI_EndOfFileError(this->m_sequenceFilePath);
+        this->log_WARNING_HI_EndOfFileError(readStage, this->m_sequenceFilePath);


Svc/FpySequencer/FpySequencerValidationState.cpp

 // reads some bytes from the open file into the m_sequenceBuffer.
 // return success if successful
-Fw::Success FpySequencer::readBytes(Os::File& file, FwSizeType expectedReadLen, bool updateCrc) {
+Fw::Success FpySequencer::readBytes(Os::File& file,


Svc/FpySequencer/FpySequencer.fpp

Svc/FpySequencer/FpySequencerDirectives.cpp

zimri-leisher · 2025-07-05T02:22:16Z

Svc/FpySequencer/test/ut/FpySequencerTestSequences.cpp

+    // this sequence caught one bug
+    allocMem();
+
+    add_SET_REG(0, 255);


with the previous NOT behavior, this test would fail. now it succeeds

Svc/FpySequencer/FpySequencerDirectives.cpp

+I64 FpySequencer::unaryRegOp_fptosi(I64 src) {
+    // first interpret as F64
+    F64 fsrc;
+    memcpy(&fsrc, &src, sizeof(fsrc));


Svc/FpySequencer/FpySequencerDirectives.cpp

+I64 FpySequencer::unaryRegOp_fptosi(I64 src) {
+    // first interpret as F64
+    F64 fsrc;
+    memcpy(&fsrc, &src, sizeof(fsrc));


Svc/FpySequencer/FpySequencerDirectives.cpp

+}
+I64 FpySequencer::unaryRegOp_sitofp(I64 src) {
+    // first static cast to float
+    F64 fsrc = static_cast<F64>(src);


Svc/FpySequencer/FpySequencerDirectives.cpp

+    F64 fsrc = static_cast<F64>(src);
+    // then return bits as I64
+    I64 res;
+    memcpy(&res, &fsrc, sizeof(res));


Svc/FpySequencer/FpySequencerDirectives.cpp

+I64 FpySequencer::unaryRegOp_fptoui(I64 src) {
+    // first interpret as F64
+    F64 fsrc;
+    memcpy(&fsrc, &src, sizeof(fsrc));


Svc/FpySequencer/FpySequencerDirectives.cpp

+    F64 fsrc = static_cast<F64>(static_cast<U64>(src));
+    // then return bits as I64
+    I64 res;
+    memcpy(&res, &fsrc, sizeof(res));


Svc/FpySequencer/FpySequencerDirectives.cpp

            res = this->unaryRegOp_fptrunc(src);
            break;
+        case Fpy::DirectiveId::FPTOSI:
+            res = this->unaryRegOp_fptosi(src);


Svc/FpySequencer/FpySequencerDirectives.cpp

+            res = this->unaryRegOp_fptosi(src);
+            break;
+        case Fpy::DirectiveId::FPTOUI:
+            res = this->unaryRegOp_fptoui(src);


Svc/FpySequencer/FpySequencerDirectives.cpp

+            res = this->unaryRegOp_fptoui(src);
+            break;
+        case Fpy::DirectiveId::SITOFP:
+            res = this->unaryRegOp_sitofp(src);


Svc/FpySequencer/FpySequencerDirectives.cpp

+            res = this->unaryRegOp_sitofp(src);
+            break;
+        case Fpy::DirectiveId::UITOFP:
+            res = this->unaryRegOp_uitofp(src);


zimri-leisher · 2025-07-05T03:29:11Z

Svc/FpySequencer/FpySequencerDirectives.cpp

+    memcpy(&fsrc, &src, sizeof(fsrc));
+    // then static cast to unsigned int
+    // then return as a signed int
+    return static_cast<I64>(static_cast<U64>(fsrc));


does this technically not do anything? probably yes... it's more explicit about what's actually going on here though. The float is supposed to be converted to a U64, and then it's supposed to be represented in the bits of an I64... to be honest, the CPP standard is confusing and I'm not sure how best to write this. It's all quite subtle...

LeStarch

I had one clarifications. Otherwise looks good.

I will note the I64 representing all registers is getting very hard to follow. Memcpys just seem wrong. I know why it is done, but I am starting to think there must be a better way.

LeStarch · 2025-07-09T00:42:52Z

Svc/FpySequencer/FpySequencerDirectives.cpp

 }
 I64 FpySequencer::unaryRegOp_not(I64 src) {
-    return ~src;
+    if (src) {


I assumed this would be a biteize not, and it seems to be a logical not. This maintains the weirdness that logical "not" can be used on non-booleans using C++ behavior. Is this intended?

Yes--the NOT instruction would theoretically work if you passed in a non boolean. However, at the high level language we disallow this--you can only take the NOT of a boolean.

Also consider, at the bytecode level, we don't really know what "is" or "isn't" a boolean--it's all just a series of 8 byte registers of unspecified type.

zimri-leisher · 2025-07-09T04:08:03Z

I had one clarifications. Otherwise looks good.

I will note the I64 representing all registers is getting very hard to follow. Memcpys just seem wrong. I know why it is done, but I am starting to think there must be a better way.

There is a better way, and it's the next thing I'm going to work on! Switching over to a stack-based architecture will mean that there won't be any registers any more. That's coming, hopefully before the design review.

LeStarch

I buy the argument

Add fptoi and itofp dirs

c0731d6

zimri-leisher requested a review from LeStarch July 4, 2025 05:35

github-advanced-security bot found potential problems Jul 4, 2025

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zimri-leisher added 2 commits July 4, 2025 15:38

Fix F32 literal

e67f524

Add some file read stage telemetry to err msgs

8438a5b

zimri-leisher commented Jul 4, 2025

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Svc/FpySequencer/FpySequencer.hpp Show resolved Hide resolved

zimri-leisher commented Jul 4, 2025

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github-advanced-security bot found potential problems Jul 4, 2025

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Update default register count to 128

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zimri-leisher changed the title ~~Add float to int conversion directives~~ Add float to int conversion directives, some misc changes Jul 4, 2025

Fix NOT directive to behave properly with if

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zimri-leisher commented Jul 5, 2025

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zimri-leisher commented Jul 5, 2025

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zimri-leisher commented Jul 5, 2025

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Make fptoi and itofp signed/unsigned

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zimri-leisher commented Jul 5, 2025

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zimri-leisher added 3 commits July 7, 2025 20:52

fix warning

ecad3a9

Fix another warning

d4c3b82

Fix sp

23fe63a

LeStarch reviewed Jul 9, 2025

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LeStarch approved these changes Jul 13, 2025

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LeStarch merged commit a91f24c into nasa:devel Jul 13, 2025
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Add float to int conversion directives, some misc changes #3847

Add float to int conversion directives, some misc changes #3847

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zimri-leisher commented Jul 4, 2025 •

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