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RISC-V Vectored-Mode Trap Entry Support? #13

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@Coekjan

asm!("csrw stvec, {}", in(reg) trap_entry as usize);

This line just sets Direct-Mode and trap.S does not support Vectored-Mode now. I suggest that this library support Vectored-Mode on RISC-V.


这行直接设置为了 Direct-Mode,而且 trap.S 目前也并不支持 Vectored-Mode。我建议本库支持 RISC-V 上的 Vectored-Mode。

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