You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
{{ message }}
This repository was archived by the owner on Mar 20, 2024. It is now read-only.
hi,
I have some questions about vstart and precise exception.
a chaining case in an in-order implementation, vector load (lmul=4) follows by vector add (lmul=4)
if i would like to chain these two instructions together,
what should the vstart value be on the cycle of vload m4 and vadd m3?
should be the oldest instruction's current element? (but vstart should be reset after vload retired)
or should I implement multiple vstart csr for different vector instruction (but no compatible to RVV?)
what if vload m3 generate exception? in section 17.1 (no instructions newer than the trapping vector instruction have altered architectural state)
Does this mean no vector chaining when there is a vector instruction which could generate exception in the middle of execution?