Add cache maintenance regs and simple API for inner cache maintenance #40
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@jonathanpallant I wrote the API with systems in mind where the cache geometry/paramters are fixed.. But maybe it would be a good idea to be able to read these geometry parameters from the corresponding CP15 registers as well? then, an alternative API for the high level clean/invalidate API which expects these geometry parameters would probably be a good idea as well.. |
robamu
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I'm OK with starting out only supporting people who know precisely which chip they are running on. |
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still needs to be tested, and I might add the API which cleans/invalidates by virtual address as well because it is required for range based cleaning/invalidation