Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2

[cezarbbb]

Proposal

I would like to promote five Thumb-mode bare-metal Arm targets to Tier 2, to join their Arm-mode counterparts which are already Tier 2:

Thumb-mode target (Tier 3 → Tier 2)	Arm-mode counterpart (already Tier 2)
thumbv7a-none-eabi	armv7a-none-eabi
thumbv7a-none-eabihf	armv7a-none-eabihf
thumbv7r-none-eabi	armv7r-none-eabi
thumbv7r-none-eabihf	armv7r-none-eabihf
thumbv8r-none-eabihf	armv8r-none-eabihf

Note: There is no thumbv8r-none-eabi target because the Cortex-R52 processor always includes an FPU, making a soft-float ABI variant unnecessary.

These Thumb-mode targets generate T32 (Thumb-2) code by default, while their Arm-mode counterparts generate A32 code by default. The two instruction sets share the same LLVM backend, the same ABI (EABI/EABIhf), and the same data layout. The only differences in the target specifications are the llvm_target string and the description. Promoting them to Tier 2 will provide pre-compiled core and alloc artifacts via rustup, making it easier for embedded developers to use Thumb-mode without -Zbuild-std.

Many embedded projects prefer Thumb-mode for its smaller code size, and Cortex-R and Cortex-A processors support both modes. Having both modes at Tier 2 ensures parity and removes the current inconsistency where Arm-mode is Tier 2 but Thumb-mode is Tier 3.

• A tier 2 target must have value to people other than its maintainers. (It may still be a niche target, but it must not be exclusively useful for an inherently closed group.)

Thumb-mode is preferred in many embedded projects for its smaller code size. Cortex-A and Cortex-R processors support both ARM and Thumb modes. Having both at Tier 2 ensures parity for all users of these processor families.

• A tier 2 target must have a designated team of developers (the "target maintainers") available to consult on target-specific build-breaking issues, or if necessary to develop target-specific language or library implementation details. This team must have at least 2 developers.

@thejpster (contacted), @davidtwco (contacted), @rust-lang/arm-maintainers (need confirmation). I'm actively reaching out to other qualified developers and will update the maintainers list as soon as I get further confirmations.

• The target must not place undue burden on Rust developers not specifically concerned with that target. Rust developers are expected to not gratuitously break a tier 2 target, but are not expected to become experts in every tier 2 target, and are not expected to provide target-specific implementations for every tier 2 target.

These targets are highly similar to their already-Tier-2 Arm-mode counterparts and share the same LLVM backend. They should not add undue burden.

• The target must provide documentation for the Rust community explaining how to build for the target using cross-compilation, and explaining how to run tests for the target. If at all possible, this documentation should show how to run Rust programs and tests for the target using emulation, to allow anyone to do so. If the target cannot be feasibly emulated, the documentation should explain how to obtain and work with physical hardware, cloud systems, or equivalent.

The existing documentation at https://doc.rust-lang.org/nightly/rustc/platform-support/armv7a-none-eabi.html, armv7r-none-eabi.html, and armv8r-none-eabihf.html already covers both ARM and Thumb variants. It will be updated to reflect the new Tier 2 status.

• The target must document its baseline expectations for the features or versions of CPUs, operating systems, libraries, runtime environments, and similar.

The existing documentation already covers this for both modes.

• If introducing a new tier 2 or higher target that is identical to an existing Rust target except for the baseline expectations for the features or versions of CPUs, operating systems, libraries, runtime environments, and similar, then the proposed target must document to the satisfaction of the approving teams why the specific difference in baseline expectations provides sufficient value to justify a separate target.

The difference is the default instruction set: A32 (ARM mode) vs T32 (Thumb mode). Thumb-mode produces smaller code, which is valuable for resource-constrained embedded systems. The processor supports both modes, and users should be able to choose either without being penalized by Tier 3 status.

• Tier 2 targets must not leave any significant portions of core or the standard library unimplemented or stubbed out, unless they cannot possibly be supported on the target.

They have full libcore and liballoc, same as the Arm-mode counterparts.

• The code generation backend for the target should not have deficiencies that invalidate Rust safety properties, as evaluated by the Rust compiler team.

Same LLVM backend as the existing Tier 2 Arm-mode targets. No known issues.

• If the target supports C code, and the target has an interoperable calling convention for C code, the Rust target must support that C calling convention for the platform via extern "C". The C calling convention does not need to be the default Rust calling convention for the target, however.

The ABI is EABI/EABIhf, the same as many other Arm targets.

• The target must build reliably in CI, for all components that Rust's CI considers mandatory.

The https://github.com/rust-embedded/cortex-ar repository already builds all five Thumb-mode targets in CI with -Zbuild-std=core. They build fine locally as well.

• The approving teams may additionally require that a subset of tests pass in CI, such as enough to build a functional "hello world" program, ./x.py test --no-run, or equivalent "smoke tests". In particular, this requirement may apply if the target builds host tools, or if the tests in question provide substantial value via early detection of critical problems.

There are no no-std tests in the tree that I'm aware of.

• Building the target in CI must not take substantially longer than the current slowest target in CI, and should not substantially raise the maintenance burden of the CI infrastructure. This requirement is subjective, to be evaluated by the infrastructure team, and will take the community importance of the target into account.

Building libcore for these targets is quite fast, comparable to the existing Arm-mode Tier 2 targets.

• Tier 2 targets should, if at all possible, support cross-compiling. Tier 2 targets should not require using the target as the host for builds, even if the target supports host tools.

They do — these are cross-compilation-only targets.

• In addition to the legal requirements for all targets (specified in the tier 3 requirements), because a tier 2 target typically involves the Rust project building and supplying various compiled binaries, incorporating the target and redistributing any resulting compiled binaries (e.g. built libraries, host tools if any) must not impose any onerous license requirements on any members of the Rust project, including infrastructure team members and those operating CI systems. This is a subjective requirement, to be evaluated by the approving teams.

Just libcore and liballoc required. No known issues.

• Tier 2 targets must not impose burden on the authors of pull requests, or other developers in the community, to ensure that tests pass for the target.

Noted.

• The target maintainers should regularly run the testsuite for the target and should fix any test failures in a reasonably timely fashion.

The https://github.com/rust-embedded/cortex-ar repository will be updated to use the rustup component when available.

The PR is rust-lang/rust#155763

Process

The main points of the Major Change Process are as follows:

• File an issue describing the proposal.
• A compiler team member who is knowledgeable in the area can second by writing @rustbot second or kickoff a team FCP with @rfcbot fcp $RESOLUTION.
  • Refer to Proposals, Approvals and Stabilization docs for when a second is sufficient, or when a full team FCP is required.
• Once an MCP is seconded, the Final Comment Period begins.
  • Final Comment Period lasts for 10 days after all outstanding concerns are solved.
  • Outstanding concerns will block the Final Comment Period from finishing. Once all concerns are resolved, the 10 day countdown is restarted.
  • If no concerns are raised after 10 days since the resolution of the last outstanding concern, the MCP is considered approved.

You can read more about Major Change Proposals on forge.

[rustbot]

Important

This issue is not meant to be used for technical discussion. There is a Zulip stream for that.
Use this issue to leave procedural comments, such as volunteering to review, indicating that you second the proposal (or third, etc), or raising a concern that you would like to be addressed.

Concerns or objections can formally be registered here by adding a comment.

@rustbot concern reason-for-concern
<description of the concern>

Concerns can be lifted with:

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See documentation at https://forge.rust-lang.org

cc @rust-lang/compiler

[cezarbbb]

Compliance with target tier policy is documented in rust-lang/rust#155763 so starting an FCP to approve this per our target approvals docs.

Could a compiler team member start FCP with rfcbot fcp merge?

[davidtwco]

@rust-rfcbot fcp merge

[rust-rfcbot]

Error encountered:
Provided team `` is invalid

[davidtwco]

@rust-rfcbot fcp merge compiler

[rust-rfcbot]

Team member @davidtwco has proposed to merge this. The next step is review by the rest of the tagged team members:

• @Mark-Simulacrum
• @SparrowLii
• @TaKO8Ki
• @cjgillot
• @davidtwco
• @estebank
• @jieyouxu
• @matthewjasper
• @nagisa
• @oli-obk
• @petrochenkov
• @spastorino
• @wesleywiser

Concerns:

• clarify-target-maintainers resolved by Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2 #985 (comment)

Once a majority of reviewers approve (and at most 2 approvals are outstanding), this will enter its final comment period. If you spot a major issue that hasn't been raised at any point in this process, please speak up!

See this document for info about what commands tagged team members can give me.

[jieyouxu]

Don't have a concern re. targets themselves, just want to double-check the target maintainers situation. See question. Happy to resolve this concern with a double-check.

@rust-rfcbot concern clarify-target-maintainers

[rustbot]

Error: Parsing ping command in comment failed: ...'aintainers' | error: expected end of command at >| ' As the T3'...

Please file an issue on GitHub at triagebot if there's a problem with this bot, or reach out on #triagebot on Zulip.

[cezarbbb]

@rustbot ping arm-maintainers
As the T32 and A32 targets share a page in the rustc book, can you continue to be the maintainers of these targets?