[WIP] MIR move elimination pass

[Amanieu]

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This is very much a work in progress, and will sometimes generate broken/unsound MIR.

[Amanieu]

@bors try @rust-timer queue

[rust-bors]

💔 Test for 884fdb2 failed: CI. Failed job:

• try - dist-x86_64-linux-quick (web logs, enhanced plaintext logs)

[Amanieu]

@bors try

[rust-bors]

💔 Test for b42852b failed: CI. Failed job:

• try - dist-x86_64-linux-quick (web logs, enhanced plaintext logs)

[Amanieu]

@bors try

[rust-bors]

💔 Test for 8165e10 failed: CI. Failed job:

• try - dist-x86_64-linux-quick (web logs, enhanced plaintext logs)

[Amanieu]

@bors try

[rust-timer]

Finished benchmarking commit (6c8a539): comparison URL.

Overall result: ❌✅ regressions and improvements - BENCHMARK(S) FAILED

Benchmarking means the PR may be perf-sensitive. It's automatically marked not fit for rolling up. Overriding is possible but disadvised: it risks changing compiler perf.

Next, please: If you can, justify the regressions found in this try perf run in writing along with @rustbot label: +perf-regression-triaged. If not, fix the regressions and do another perf run. Neutral or positive results will clear the label automatically.

@bors rollup=never
@rustbot label: -S-waiting-on-perf +perf-regression

❗ ❗ ❗ ❗ ❗
Warning ⚠️: The following benchmark(s) failed to build:

• many-assoc-items
• Job failure
• unify-linearly
• regex-automata-0.4.8
• bitmaps-3.2.1
• image-0.25.6
• diesel-2.2.10
• html5ever-0.31.0
• wg-grammar
• serde-1.0.219-threads4
• stm32f4-0.15.1
• ucd
• nalgebra-0.33.0
• issue-88862
• regression-31157
• issue-58319
• issue-46449
• unicode-normalization-0.1.24
• serde-1.0.219
• libc-0.2.172
• match-stress
• ripgrep-14.1.1

❗ ❗ ❗ ❗ ❗

Instruction count

Our most reliable metric. Used to determine the overall result above. However, even this metric can be noisy.

	mean	range	count
Regressions ❌ (primary)	8.2%	[0.1%, 114.4%]	74
Regressions ❌ (secondary)	123.6%	[0.0%, 4845.7%]	86
Improvements ✅ (primary)	-1.7%	[-28.9%, -0.2%]	144
Improvements ✅ (secondary)	-1.1%	[-10.3%, -0.1%]	141
All ❌✅ (primary)	1.7%	[-28.9%, 114.4%]	218

Max RSS (memory usage)

Results (primary 6.2%, secondary 20.9%)

A less reliable metric. May be of interest, but not used to determine the overall result above.

	mean	range	count
Regressions ❌ (primary)	8.2%	[1.4%, 32.7%]	40
Regressions ❌ (secondary)	27.4%	[1.8%, 181.5%]	17
Improvements ✅ (primary)	-3.7%	[-11.9%, -1.3%]	8
Improvements ✅ (secondary)	-1.1%	[-1.8%, -0.4%]	5
All ❌✅ (primary)	6.2%	[-11.9%, 32.7%]	48

Cycles

Results (primary 18.5%, secondary 1818.1%)

A less reliable metric. May be of interest, but not used to determine the overall result above.

	mean	range	count
Regressions ❌ (primary)	50.8%	[1.6%, 640.4%]	31
Regressions ❌ (secondary)	4249.4%	[0.8%, 58688.0%]	27
Improvements ✅ (primary)	-5.2%	[-26.6%, -1.9%]	42
Improvements ✅ (secondary)	-5.3%	[-22.8%, -0.5%]	36
All ❌✅ (primary)	18.5%	[-26.6%, 640.4%]	73

Binary size

Results (primary 5.0%, secondary 2.8%)

A less reliable metric. May be of interest, but not used to determine the overall result above.

	mean	range	count
Regressions ❌ (primary)	6.2%	[0.1%, 97.4%]	109
Regressions ❌ (secondary)	3.4%	[0.1%, 72.6%]	138
Improvements ✅ (primary)	-0.8%	[-2.7%, -0.1%]	22
Improvements ✅ (secondary)	-1.0%	[-4.8%, -0.3%]	20
All ❌✅ (primary)	5.0%	[-2.7%, 97.4%]	131

Bootstrap: 495.343s -> 534.143s (7.83%)
Artifact size: 394.42 MiB -> 393.29 MiB (-0.29%)

[Amanieu]

@bors try @rust-timer queue

[rust-bors]

☀️ Try build successful (CI)
Build commit: 7de3958 (7de3958b0ecd03f5482e7d2988a4f1c6a380ec95, parent: 783062d3c612d223e6841db4bbbc9bac4ab31ff4)

[rust-timer]

Finished benchmarking commit (7de3958): comparison URL.

Overall result: ❌✅ regressions and improvements - BENCHMARK(S) FAILED

Benchmarking means the PR may be perf-sensitive. It's automatically marked not fit for rolling up. Overriding is possible but disadvised: it risks changing compiler perf.

Next, please: If you can, justify the regressions found in this try perf run in writing along with @rustbot label: +perf-regression-triaged. If not, fix the regressions and do another perf run. Neutral or positive results will clear the label automatically.

@bors rollup=never
@rustbot label: -S-waiting-on-perf +perf-regression

❗ ❗ ❗ ❗ ❗
Warning ⚠️: The following benchmark(s) failed to build:

• Job failure
• ripgrep-14.1.1
• libc-0.2.172
• issue-58319
• many-assoc-items
• html5ever-0.31.0
• unicode-normalization-0.1.24
• match-stress
• diesel-2.2.10
• regex-automata-0.4.8
• image-0.25.6
• nalgebra-0.33.0
• serde-1.0.219
• ucd
• issue-46449
• wg-grammar
• unify-linearly
• issue-88862
• serde-1.0.219-threads4
• bitmaps-3.2.1
• stm32f4-0.15.1
• regression-31157

❗ ❗ ❗ ❗ ❗

Instruction count

Our most reliable metric. Used to determine the overall result above. However, even this metric can be noisy.

	mean	range	count
Regressions ❌ (primary)	2.3%	[0.1%, 9.4%]	28
Regressions ❌ (secondary)	12.6%	[0.0%, 676.7%]	82
Improvements ✅ (primary)	-2.0%	[-29.0%, -0.2%]	138
Improvements ✅ (secondary)	-1.2%	[-6.4%, -0.2%]	136
All ❌✅ (primary)	-1.3%	[-29.0%, 9.4%]	166

Max RSS (memory usage)

Results (primary -0.8%, secondary 1.1%)

A less reliable metric. May be of interest, but not used to determine the overall result above.

	mean	range	count
Regressions ❌ (primary)	2.8%	[1.4%, 3.9%]	7
Regressions ❌ (secondary)	3.2%	[0.4%, 5.2%]	8
Improvements ✅ (primary)	-2.9%	[-11.6%, -0.8%]	12
Improvements ✅ (secondary)	-1.6%	[-2.8%, -0.6%]	6
All ❌✅ (primary)	-0.8%	[-11.6%, 3.9%]	19

Cycles

Results (primary -3.6%, secondary 2.4%)

A less reliable metric. May be of interest, but not used to determine the overall result above.

	mean	range	count
Regressions ❌ (primary)	5.4%	[1.7%, 8.4%]	8
Regressions ❌ (secondary)	31.9%	[0.5%, 236.1%]	15
Improvements ✅ (primary)	-5.1%	[-27.5%, -1.9%]	49
Improvements ✅ (secondary)	-5.2%	[-19.9%, -0.8%]	58
All ❌✅ (primary)	-3.6%	[-27.5%, 8.4%]	57

Binary size

Results (primary 0.0%, secondary 1.3%)

A less reliable metric. May be of interest, but not used to determine the overall result above.

	mean	range	count
Regressions ❌ (primary)	1.3%	[0.1%, 3.9%]	70
Regressions ❌ (secondary)	2.3%	[0.0%, 3.8%]	82
Improvements ✅ (primary)	-1.4%	[-4.0%, -0.2%]	63
Improvements ✅ (secondary)	-1.8%	[-8.5%, -0.3%]	25
All ❌✅ (primary)	0.0%	[-4.0%, 3.9%]	133

Bootstrap: 495.891s -> 480.313s (-3.14%)
Artifact size: 394.42 MiB -> 393.00 MiB (-0.36%)

[Amanieu]

@bors try @rust-timer queue

[rust-log-analyzer]

The job aarch64-gnu-llvm-21-1 failed! Check out the build log: (web) (plain enhanced) (plain)

Click to see the possible cause of the failure (guessed by this bot)

##[endgroup]
Executing "/scripts/stage_2_test_set1.sh"
+ /scripts/stage_2_test_set1.sh
+ '[' 1 == 1 ']'
+ echo 'PR_CI_JOB set; skipping tidy'
+ SKIP_TIDY='--skip tidy'
+ ../x.py --stage 2 test --skip tidy --skip compiler --skip src
PR_CI_JOB set; skipping tidy
##[group]Building bootstrap
    Finished `dev` profile [unoptimized] target(s) in 0.04s
##[endgroup]
---
27           StorageLive(_3);
28           _3 = copy (*_1);
29           StorageLive(_4);
-           StorageLive(_5);
31           _4 = discriminant(_3);
32           switchInt(move _4) -> [0: bb2, 1: bb3, otherwise: bb1];
33       }

34   
35       bb1: {
+           StorageDead(_4);
---

39       bb2: {
+ -         StorageDead(_4);
40 -         assume(const false);
+ -         StorageLive(_5);
41 -         _5 = unreachable_unchecked::precondition_check() -> [return: bb1, unwind unreachable];
42 +         unreachable;
43       }

44   
45       bb3: {
-           _2 = move ((_3 as Some).0: i32);
-           StorageDead(_5);
48           StorageDead(_4);
+           _2 = move ((_3 as Some).0: i32);
49           StorageDead(_3);
50           _0 = copy _2;
51           StorageDead(_2);


---
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/const_prop/trivial_const.rs stdout end ----
---- [mir-opt] tests/mir-opt/dataflow-const-prop/default_boxed_slice.rs stdout ----
9           debug a => _1;
10       }
11       scope 2 (inlined <Box<[bool]> as Default>::default) {
-           let _3: std::ptr::Unique<[bool]>;
-           let mut _4: std::ptr::Unique<[bool; 0]>;
+           let mut _3: std::ptr::Unique<[bool; 0]>;
14           scope 3 {
15           }
16           scope 4 (inlined std::ptr::Unique::<[bool; 0]>::dangling) {

-               let mut _5: std::ptr::NonNull<[bool; 0]>;
18               scope 5 (inlined NonNull::<[bool; 0]>::dangling) {
19                   scope 6 {
20                       scope 8 (inlined std::mem::Alignment::as_nonzero_usize) {

32           StorageLive(_1);
33           StorageLive(_2);
34           StorageLive(_3);
-           StorageLive(_4);
-           StorageLive(_5);
- -         _5 = const <[bool; 0] as std::mem::SizedTypeProperties>::ALIGNMENT as std::ptr::NonNull<[bool; 0]> (Transmute);
- -         _4 = std::ptr::Unique::<[bool; 0]> { pointer: move _5, _marker: const PhantomData::<[bool; 0]> };
- +         _5 = const NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} is !null }};
- +         _4 = const std::ptr::Unique::<[bool; 0]> {{ pointer: NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} is !null }}, _marker: PhantomData::<[bool; 0]> }};
-           StorageDead(_5);
- -         _3 = move _4 as std::ptr::Unique<[bool]> (PointerCoercion(Unsize, Implicit));
- +         _3 = const std::ptr::Unique::<[bool]> {{ pointer: NonNull::<[bool]> {{ pointer: Indirect { alloc_id: ALLOC0, offset: Size(0 bytes) }: (*const [bool]) is !null }}, _marker: PhantomData::<[bool]> }};
-           StorageDead(_4);
- -         _2 = Box::<[bool]>(copy _3, const std::alloc::Global);
- +         _2 = const Box::<[bool]>(std::ptr::Unique::<[bool]> {{ pointer: NonNull::<[bool]> {{ pointer: Indirect { alloc_id: ALLOC1, offset: Size(0 bytes) }: (*const [bool]) is !null }}, _marker: PhantomData::<[bool]> }}, std::alloc::Global);
+ -         (_3.0: std::ptr::NonNull<[bool; 0]>) = const <[bool; 0] as std::mem::SizedTypeProperties>::ALIGNMENT as std::ptr::NonNull<[bool; 0]> (Transmute);
+ +         (_3.0: std::ptr::NonNull<[bool; 0]>) = const NonNull::<[bool; 0]> {{ pointer: {0x1 as *const [bool; 0]} is !null }};
+           (_2.0: std::ptr::Unique<[bool]>) = move _3 as std::ptr::Unique<[bool]> (PointerCoercion(Unsize, Implicit));
47           StorageDead(_3);
- -         _1 = A { foo: move _2 };
- +         _1 = const A {{ foo: Box::<[bool]>(std::ptr::Unique::<[bool]> {{ pointer: NonNull::<[bool]> {{ pointer: Indirect { alloc_id: ALLOC2, offset: Size(0 bytes) }: (*const [bool]) is !null }}, _marker: PhantomData::<[bool]> }}, std::alloc::Global) }};
+ -         (_2.1: std::alloc::Global) = no_retag const std::alloc::Global;
+ +         (_2.1: std::alloc::Global) = const std::alloc::Global;
+           _1 = A { foo: move _2 };
50           StorageDead(_2);
51           _0 = const ();
52           drop(_1) -> [return: bb1, unwind: bb2];

61           resume;
62       }
63   }
- + 
- + ALLOC2 (size: 16, align: 8) { .. }
- + 
- + ALLOC1 (size: 16, align: 8) { .. }
- + 
- + ALLOC0 (size: 16, align: 8) { .. }
70   
71 


thread '[mir-opt] tests/mir-opt/dataflow-const-prop/default_boxed_slice.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/dataflow-const-prop/default_boxed_slice.main.GVN.64bit.panic-unwind.diff
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
45       bb0: {
46           StorageLive(_4);
-           StorageLive(_20);
48           StorageLive(_21);
49           _21 = copy (((*_1).0: std::fmt::FormattingOptions).0: u32);
+           StorageLive(_20);
50           _20 = BitAnd(move _21, const 2097152_u32);
51           StorageDead(_21);
52           _4 = Ne(move _20, const 0_u32);

69   
70       bb3: {
71           StorageLive(_6);
-           StorageLive(_22);
73           StorageLive(_23);
74           _23 = copy (((*_1).0: std::fmt::FormattingOptions).0: u32);
+           StorageLive(_22);
75           _22 = BitAnd(move _23, const 268435456_u32);
76           StorageDead(_23);
77           switchInt(copy _22) -> [0: bb10, otherwise: bb11];

153       bb11: {
154           StorageDead(_22);
155           StorageLive(_24);
-           StorageLive(_25);
-           _25 = copy (((*_1).0: std::fmt::FormattingOptions).2: u16);
-           _24 = move _25 as usize (IntToInt);
-           StorageDead(_25);
-           _6 = Option::<usize>::Some(move _24);
+           _24 = copy (((*_1).0: std::fmt::FormattingOptions).2: u16);
+           ((_6 as variant#1).0: usize) = move _24 as usize (IntToInt);
161           StorageDead(_24);
+           discriminant(_6) = 1;
162           goto -> bb9;
163       }
164   


thread '[mir-opt] tests/mir-opt/funky_arms.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/funky_arms.float_to_exponential_common.GVN.64bit.panic-unwind.diff
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/funky_arms.rs stdout end ----
---- [mir-opt] tests/mir-opt/gvn_copy_constant_projection.rs stdout ----
46 -         _10 = copy (*_6);
47 +         _10 = copy _2[0 of 1];
48           _0 = Cmp(move _9, move _10);
-           StorageDead(_10);
50           StorageDead(_9);
+           StorageDead(_10);
51           StorageDead(_7);
52           StorageDead(_4);
53           return;


thread '[mir-opt] tests/mir-opt/gvn_copy_constant_projection.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/gvn_copy_constant_projection.compare_constant_index.GVN.panic-unwind.diff
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/gvn_copy_constant_projection.rs stdout end ----
---- [mir-opt] tests/mir-opt/inline/dont_ice_on_generic_rust_call.rs stdout ----
19           StorageLive(_4);
20           _4 = move _2;
21 -         _0 = <Box<dyn FnMut<I, Output = ()>> as FnMut<I>>::call_mut(move _3, move _4) -> [return: bb1, unwind: bb3];
- +         StorageLive(_6);
23 +         StorageLive(_7);
- +         StorageLive(_5);
25 +         _7 = no_retag copy (((*_3).0: std::ptr::Unique<dyn std::ops::FnMut<I, Output = ()>>).0: std::ptr::NonNull<dyn std::ops::FnMut<I, Output = ()>>);
+ +         StorageLive(_6);
26 +         _6 = copy _7 as *const dyn std::ops::FnMut<I, Output = ()> (Transmute);
+ +         StorageLive(_5);
+ +         StorageDead(_7);
27 +         _5 = &mut (*_6);
+ +         StorageDead(_6);
28 +         _0 = <dyn FnMut<I, Output = ()> as FnMut<I>>::call_mut(move _5, move _4) -> [return: bb4, unwind: bb2];
29       }
30   

50 -         resume;
51 +     bb4: {
52 +         StorageDead(_5);
- +         StorageDead(_7);
- +         StorageDead(_6);
55 +         StorageDead(_4);
56 +         StorageDead(_3);
57 +         drop(_1) -> [return: bb1, unwind: bb3];


thread '[mir-opt] tests/mir-opt/inline/dont_ice_on_generic_rust_call.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/inline/dont_ice_on_generic_rust_call.call.Inline.panic-unwind.diff
stack backtrace:
---
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/inline/dont_ice_on_generic_rust_call.rs stdout end ----
---- [mir-opt] tests/mir-opt/inline/exponential_runtime.rs stdout ----
39           StorageLive(_1);
40 -         _1 = <() as G>::call() -> [return: bb1, unwind continue];
41 +         StorageLive(_2);
- +         StorageLive(_3);
- +         StorageLive(_4);
44 +         StorageLive(_5);
- +         StorageLive(_6);
---
53 +         StorageLive(_14);
- +         StorageLive(_15);
- +         StorageLive(_16);
56 +         StorageLive(_17);
- +         StorageLive(_18);
- +         StorageLive(_19);
- +         _17 = <() as A>::call() -> [return: bb12, unwind continue];
+ +         _17 = <() as A>::call() -> [return: bb11, unwind continue];
60       }
61   
62       bb1: {

- +         StorageDead(_4);
64 +         StorageDead(_3);
- +         StorageDead(_2);
+ +         StorageLive(_4);
+ +         _4 = <() as F>::call() -> [return: bb2, unwind continue];
+ +     }
+ + 
+ +     bb2: {
+ +         StorageDead(_4);
66           StorageDead(_1);
67           _0 = const ();
68           return;

69 +     }
70 + 
- +     bb2: {
- +         _4 = <() as F>::call() -> [return: bb1, unwind continue];
- +     }
- + 
75 +     bb3: {
- +         StorageDead(_7);
77 +         StorageDead(_6);
- +         StorageDead(_5);
- +         _3 = <() as F>::call() -> [return: bb2, unwind continue];
+ +         StorageLive(_7);
+ +         _7 = <() as E>::call() -> [return: bb4, unwind continue];
80 +     }
81 + 
82 +     bb4: {

- +         _7 = <() as E>::call() -> [return: bb3, unwind continue];
+ +         StorageDead(_7);
+ +         StorageDead(_2);
+ +         StorageLive(_3);
+ +         _3 = <() as F>::call() -> [return: bb1, unwind continue];
84 +     }
85 + 
86 +     bb5: {

- +         StorageDead(_10);
88 +         StorageDead(_9);
- +         StorageDead(_8);
- +         _6 = <() as E>::call() -> [return: bb4, unwind continue];
+ +         StorageLive(_10);
+ +         _10 = <() as D>::call() -> [return: bb6, unwind continue];
91 +     }
92 + 
93 +     bb6: {

- +         _10 = <() as D>::call() -> [return: bb5, unwind continue];
+ +         StorageDead(_10);
+ +         StorageDead(_5);
+ +         StorageLive(_6);
+ +         _6 = <() as E>::call() -> [return: bb3, unwind continue];
95 +     }
96 + 
97 +     bb7: {

- +         StorageDead(_13);
99 +         StorageDead(_12);
- +         StorageDead(_11);
- +         _9 = <() as D>::call() -> [return: bb6, unwind continue];
+ +         StorageLive(_13);
+ +         _13 = <() as C>::call() -> [return: bb8, unwind continue];
102 +     }
103 + 
104 +     bb8: {

- +         _13 = <() as C>::call() -> [return: bb7, unwind continue];
+ +         StorageDead(_13);
+ +         StorageDead(_8);
+ +         StorageLive(_9);
+ +         _9 = <() as D>::call() -> [return: bb5, unwind continue];
106 +     }
107 + 
108 +     bb9: {

- +         StorageDead(_16);
110 +         StorageDead(_15);
- +         StorageDead(_14);
- +         _12 = <() as C>::call() -> [return: bb8, unwind continue];
+ +         StorageLive(_16);
+ +         _16 = <() as B>::call() -> [return: bb10, unwind continue];
113 +     }
114 + 
115 +     bb10: {

- +         _16 = <() as B>::call() -> [return: bb9, unwind continue];
+ +         StorageDead(_16);
+ +         StorageDead(_11);
+ +         StorageLive(_12);
+ +         _12 = <() as C>::call() -> [return: bb7, unwind continue];
117 +     }
118 + 
119 +     bb11: {

- +         StorageDead(_19);
- +         StorageDead(_18);
122 +         StorageDead(_17);
- +         _15 = <() as B>::call() -> [return: bb10, unwind continue];
+ +         StorageLive(_18);
+ +         _18 = <() as A>::call() -> [return: bb12, unwind continue];
124 +     }
125 + 
126 +     bb12: {

- +         _18 = <() as A>::call() -> [return: bb13, unwind continue];
+ +         StorageDead(_18);
+ +         StorageLive(_19);
+ +         _19 = <() as A>::call() -> [return: bb13, unwind continue];
128 +     }
129 + 
130 +     bb13: {

- +         _19 = <() as A>::call() -> [return: bb11, unwind continue];
+ +         StorageDead(_19);
+ +         StorageDead(_14);
+ +         StorageLive(_15);
+ +         _15 = <() as B>::call() -> [return: bb9, unwind continue];
132       }
133   }
134   


---
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/inline/exponential_runtime.rs stdout end ----
---- [mir-opt] tests/mir-opt/inline/inline_box_fn.rs stdout ----
20           StorageLive(_4);
21           _4 = (const 1_i32,);
22 -         _2 = <Box<dyn Fn(i32)> as Fn<(i32,)>>::call(move _3, move _4) -> [return: bb1, unwind: bb3];
- +         StorageLive(_6);
24 +         StorageLive(_7);
- +         StorageLive(_5);
26 +         _7 = no_retag copy (((*_3).0: std::ptr::Unique<dyn std::ops::Fn(i32)>).0: std::ptr::NonNull<dyn std::ops::Fn(i32)>);
+ +         StorageLive(_6);
27 +         _6 = copy _7 as *const dyn std::ops::Fn(i32) (Transmute);
+ +         StorageLive(_5);
+ +         StorageDead(_7);
28 +         _5 = &(*_6);
+ +         StorageDead(_6);
29 +         _2 = <dyn Fn(i32) as Fn<(i32,)>>::call(move _5, move _4) -> [return: bb4, unwind: bb2];
30       }
31   

53 -         resume;
54 +     bb4: {
---
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/inline/inline_box_fn.rs stdout end ----
---- [mir-opt] tests/mir-opt/inline/inline_closure_captures.rs stdout ----
15         debug x => _3;
16         scope 2 (inlined foo::<T>::{closure#0}) {
17             let mut _10: &i32;
-             let mut _11: i32;
-             let mut _12: &T;
-             let mut _13: T;
+             let mut _11: &T;
21         }
22     }
23 

39         StorageLive(_9);
40         _9 = move (_7.0: i32);
41         StorageLive(_10);
-         StorageLive(_12);
-         StorageLive(_11);
44         _10 = no_retag copy ((*_6).0: &i32);
-         _11 = copy (*_10);
-         StorageLive(_13);
-         _12 = no_retag copy ((*_6).1: &T);
-         _13 = copy (*_12);
-         _0 = (move _11, move _13);
-         StorageDead(_13);
-         StorageDead(_11);
-         StorageDead(_12);
+         (_0.0: i32) = copy (*_10);
53         StorageDead(_10);
+         StorageLive(_11);
+         _11 = no_retag copy ((*_6).1: &T);
+         (_0.1: T) = copy (*_11);
+         StorageDead(_11);
54         StorageDead(_9);
55         StorageDead(_8);
56         StorageDead(_7);


thread '[mir-opt] tests/mir-opt/inline/inline_closure_captures.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/inline/inline_closure_captures.foo.Inline.after.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/inline/inline_closure_captures.rs stdout end ----
---- [mir-opt] tests/mir-opt/inline/inline_coroutine.rs stdout ----
22 +         debug a => _5;
23 +         let mut _6: &mut {coroutine@$DIR/inline_coroutine.rs:20:5: 20:8};
24 +         let mut _7: u32;
- +         let mut _8: i32;
26 +     }
27   
28       bb0: {

38 +         StorageLive(_5);
39 +         _5 = const false;
40 +         StorageLive(_6);
- +         StorageLive(_7);
42 +         _6 = copy (_2.0: &mut {coroutine@$DIR/inline_coroutine.rs:20:5: 20:8});
+ +         StorageLive(_7);
43 +         _7 = discriminant((*_6));
44 +         switchInt(move _7) -> [0: bb5, 1: bb9, 3: bb10, otherwise: bb11];
45       }

72 -         _0 = const ();
73 -         StorageDead(_1);
74 -         return;
- +         StorageDead(_7);
- +         StorageDead(_6);
77 +         StorageDead(_5);
78 +         StorageDead(_2);
79 +         drop(_4) -> [return: bb1, unwind: bb3];

82 -     bb5 (cleanup): {
83 -         drop(_4) -> [return: bb6, unwind terminate(cleanup)];
84 +     bb5: {
- +         StorageLive(_8);
+ +         StorageDead(_7);
86 +         switchInt(copy _5) -> [0: bb6, otherwise: bb7];
87       }
88   

89 -     bb6 (cleanup): {
90 -         resume;
91 +     bb6: {
- +         _8 = const 13_i32;
+ +         ((_1 as variant#0).0: i32) = const 13_i32;
93 +         goto -> bb8;
94 +     }
95 + 

96 +     bb7: {
- +         _8 = const 7_i32;
+ +         ((_1 as variant#0).0: i32) = const 7_i32;
98 +         goto -> bb8;
99 +     }
100 + 

101 +     bb8: {
- +         _1 = CoroutineState::<i32, bool>::Yielded(move _8);
- +         StorageDead(_8);
+ +         discriminant(_1) = 0;
104 +         discriminant((*_6)) = 3;
+ +         StorageDead(_6);
105 +         goto -> bb4;
106 +     }
107 + 

108 +     bb9: {
+ +         StorageDead(_7);
+ +         StorageDead(_6);
109 +         assert(const false, "coroutine resumed after completion") -> [success: bb9, unwind: bb2];
110 +     }
111 + 

112 +     bb10: {
- +         StorageLive(_8);
- +         StorageDead(_8);
+ +         StorageDead(_7);
115 +         _1 = CoroutineState::<i32, bool>::Complete(copy _5);
116 +         discriminant((*_6)) = 1;
+ +         StorageDead(_6);
117 +         goto -> bb4;
118 +     }
119 + 

120 +     bb11: {
+ +         StorageDead(_7);
---
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/inline/inline_coroutine.rs stdout end ----
---- [mir-opt] tests/mir-opt/inline/inline_diverging.rs stdout ----
5       let mut _0: ();
6       let _1: (!, !);
7 +     let mut _2: fn() -> ! {sleep};
+ +     let mut _5: !;
+ +     let mut _6: ();
+ +     let mut _7: !;
8 +     let mut _8: ();
- +     let mut _9: ();
10 +     scope 1 (inlined call_twice::<!, fn() -> ! {sleep}>) {
11 +         debug f => _2;
12 +         let mut _3: &fn() -> ! {sleep};

- +         let _4: !;
- +         let mut _5: &fn() -> ! {sleep};
- +         let mut _7: !;
+ +         let mut _4: &fn() -> ! {sleep};
16 +         scope 2 {
- +             debug a => _4;
- +             let _6: !;
+ +             debug a => (_1.0: !);
19 +             scope 3 {
- +                 debug b => _6;
+ +                 debug b => (_1.1: !);
21 +             }
22 +             scope 6 (inlined <fn() -> ! {sleep} as Fn<()>>::call - shim(fn() -> ! {sleep})) {
23 +                 scope 7 (inlined sleep) {

35 -         _1 = call_twice::<!, fn() -> ! {sleep}>(sleep) -> unwind continue;
36 +         StorageLive(_2);
37 +         _2 = sleep;
- +         StorageLive(_4);
39 +         StorageLive(_3);
40 +         _3 = &_2;
---
15         StorageLive(_3);
16         _3 = copy _1;
17         StorageLive(_4);
-         StorageLive(_5);
-         _4 = other_thing(copy _3) -> [return: bb2, unwind continue];
+         _4 = other_thing(copy _3) -> [return: bb1, unwind continue];
20     }
21 
22     bb1: {

-         StorageDead(_5);
24         StorageDead(_4);
+         StorageLive(_5);
+         _5 = other_thing(move _3) -> [return: bb2, unwind continue];
+     }
+ 
+     bb2: {
+         StorageDead(_5);
25         StorageDead(_3);
26         StorageDead(_2);
27         _0 = const ();

28         return;
-     }
- 
-     bb2: {
-         _5 = other_thing(move _3) -> [return: bb1, unwind continue];
33     }
34 }
35 


thread '[mir-opt] tests/mir-opt/inline/inline_more_in_non_inline.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/inline/inline_more_in_non_inline.monomorphic_not_inline.Inline.after.panic-unwind.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
20         StorageLive(_2);
21         StorageLive(_3);
-         StorageLive(_4);
-         StorageLive(_5);
-         _3 = g() -> [return: bb3, unwind continue];
+         _3 = g() -> [return: bb2, unwind continue];
25     }
26 
27     bb2: {

-         StorageDead(_5);
-         StorageDead(_4);
30         StorageDead(_3);
-         StorageDead(_2);
-         _0 = const ();
-         return;
+         StorageLive(_4);
+         _4 = g() -> [return: bb3, unwind continue];
34     }
35 
36     bb3: {

-         _4 = g() -> [return: bb4, unwind continue];
+         StorageDead(_4);
+         StorageLive(_5);
+         _5 = g() -> [return: bb4, unwind continue];
38     }
39 
40     bb4: {

-         _5 = g() -> [return: bb2, unwind continue];
+         StorageDead(_5);
+         StorageDead(_2);
+         _0 = const ();
+         return;
42     }
43 }
44 


thread '[mir-opt] tests/mir-opt/inline/inline_options.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/inline/inline_options.main.Inline.after.panic-unwind.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/inline/inline_options.rs stdout end ----
---- [mir-opt] tests/mir-opt/inline/issue_106141.rs stdout ----
18       bb0: {
19 -         _0 = inner() -> [return: bb1, unwind continue];
20 +         StorageLive(_1);
- +         StorageLive(_2);
22 +         _1 = const inner::promoted[0];
- +         _0 = index() -> [return: bb1, unwind continue];
+ +         _0 = index() -> [return: bb2, unwind continue];
24       }
25   
26       bb1: {

- +         StorageLive(_3);
- +         _2 = Lt(copy _0, const 1_usize);
- +         assert(move _2, "index out of bounds: the length is {} but the index is {}", const 1_usize, copy _0) -> [success: bb2, unwind continue];
+           return;
30 +     }
31 + 
32 +     bb2: {

- +         _3 = copy (*_1)[_0];
- +         switchInt(move _3) -> [0: bb3, otherwise: bb4];
+ +         StorageLive(_2);
+ +         _2 = Lt(copy _0, const 1_usize);
+ +         assert(move _2, "index out of bounds: the length is {} but the index is {}", const 1_usize, copy _0) -> [success: bb3, unwind continue];
35 +     }
36 + 
37 +     bb3: {

- +         _0 = const 0_usize;
- +         goto -> bb4;
+ +         StorageLive(_3);
+ +         StorageDead(_2);
+ +         _3 = copy (*_1)[_0];
+ +         StorageDead(_1);
+ +         switchInt(move _3) -> [0: bb4, otherwise: bb5];
40 +     }
41 + 
42 +     bb4: {

43 +         StorageDead(_3);
---
48   }
49   


thread '[mir-opt] tests/mir-opt/inline/issue_106141.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/inline/issue_106141.outer.Inline.panic-unwind.diff
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
18         StorageLive(_4);
19         _4 = no_retag copy _1;
-         StorageLive(_5);
21         StorageLive(_6);
22         _6 = no_retag copy (((*_4).0: std::ptr::Unique<T>).0: std::ptr::NonNull<T>);
+         StorageLive(_5);
23         _5 = copy _6 as *const T (Transmute);
-         _3 = &mut (*_5);
25         StorageDead(_6);
+         _3 = &mut (*_5);
26         StorageDead(_5);
27         _2 = copy _3;
28         StorageDead(_4);


thread '[mir-opt] tests/mir-opt/inline/issue_58867_inline_as_ref_as_mut.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/inline/issue_58867_inline_as_ref_as_mut.b.Inline.after.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
5     let _1: ();
6 
7     bb0: {
+         StorageLive(_1);
8         _1 = callee() -> [return: bb1, unwind continue];
9     }
10 

11     bb1: {
+         StorageDead(_1);
12         return;
13     }
14 }


thread '[mir-opt] tests/mir-opt/inline/rustc_no_mir_inline.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/inline/rustc_no_mir_inline.caller.PreCodegen.after.panic-unwind.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/inline/rustc_no_mir_inline.rs stdout end ----
---- [mir-opt] tests/mir-opt/inline/unchecked_shifts.rs stdout ----
21           StorageLive(_4);
22           _4 = copy _2;
23 -         _0 = core::num::<impl u16>::unchecked_shl(move _3, move _4) -> [return: bb1, unwind continue];
- +         StorageLive(_5);
25 +         switchInt(UbChecks) -> [0: bb2, otherwise: bb1];
26       }
27   

28       bb1: {
+ +         StorageLive(_5);
29 +         _5 = core::num::<impl u16>::unchecked_shl::precondition_check(copy _4) -> [return: bb2, unwind unreachable];
30 +     }
31 + 

32 +     bb2: {
- +         _0 = ShlUnchecked(copy _3, copy _4);
34 +         StorageDead(_5);
+ +         _0 = ShlUnchecked(copy _3, copy _4);
35           StorageDead(_4);
36           StorageDead(_3);
37           return;


thread '[mir-opt] tests/mir-opt/inline/unchecked_shifts.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-unwind.diff
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/inline/unchecked_shifts.rs stdout end ----
---- [mir-opt] tests/mir-opt/inline/unwrap_unchecked.rs stdout ----
23           _2 = move _1;
24 -         _0 = Option::<T>::unwrap_unchecked(move _2) -> [return: bb1, unwind: bb2];
25 +         StorageLive(_3);
- +         StorageLive(_4);
27 +         _3 = discriminant(_2);
28 +         switchInt(move _3) -> [0: bb2, 1: bb3, otherwise: bb1];
29       }

31       bb1: {
32 -         StorageDead(_2);
33 -         return;
---

37 -     bb2 (cleanup): {
38 -         resume;
39 +     bb2: {
+ +         StorageDead(_3);
40 +         assume(UbChecks);
+ +         StorageLive(_4);
41 +         _4 = unreachable_unchecked::precondition_check() -> [return: bb1, unwind unreachable];
42 +     }
43 + 

44 +     bb3: {
- +         _0 = move ((_2 as Some).0: T);
- +         StorageDead(_4);
47 +         StorageDead(_3);
+ +         _0 = move ((_2 as Some).0: T);
48 +         StorageDead(_2);
49 +         return;
50       }


---
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/inline/unwrap_unchecked.rs stdout end ----
---- [mir-opt] tests/mir-opt/inline_coroutine_body.rs stdout ----
50 +                         scope 12 (inlined Pin::<&mut std::future::Ready<()>>::new_unchecked) {
51 +                         }
52 +                         scope 13 (inlined <std::future::Ready<()> as Future>::poll) {
- +                             let mut _34: ();
- +                             let mut _35: std::option::Option<()>;
- +                             let mut _36: &mut std::option::Option<()>;
- +                             let mut _37: &mut std::future::Ready<()>;
- +                             let mut _38: &mut std::pin::Pin<&mut std::future::Ready<()>>;
+ +                             let mut _33: std::option::Option<()>;
+ +                             let mut _34: &mut std::option::Option<()>;
+ +                             let mut _35: &mut std::future::Ready<()>;
+ +                             let mut _36: &mut std::pin::Pin<&mut std::future::Ready<()>>;
58 +                             scope 14 (inlined <Pin<&mut std::future::Ready<()>> as DerefMut>::deref_mut) {
- +                                 let mut _39: *mut std::pin::helper::PinHelper<&mut std::future::Ready<()>>;
- +                                 let mut _40: *mut std::pin::Pin<&mut std::future::Ready<()>>;
+ +                                 let mut _37: *mut std::pin::helper::PinHelper<&mut std::future::Ready<()>>;
+ +                                 let mut _38: *mut std::pin::Pin<&mut std::future::Ready<()>>;
61 +                                 scope 15 (inlined <pin::helper::PinHelper<&mut std::future::Ready<()>> as pin::helper::PinDerefMutHelper>::deref_mut) {
- +                                     let mut _41: &mut &mut std::future::Ready<()>;
+ +                                     let mut _39: &mut &mut std::future::Ready<()>;
63 +                                     scope 16 (inlined <&mut std::future::Ready<()> as DerefMut>::deref_mut) {
64 +                                     }
65 +                                 }

66 +                             }
67 +                             scope 17 (inlined Option::<()>::take) {
- +                                 let mut _42: std::option::Option<()>;
+ +                                 let mut _40: std::option::Option<()>;
69 +                                 scope 18 (inlined std::mem::replace::<Option<()>>) {
70 +                                     scope 19 {
71 +                                     }

72 +                                 }
73 +                             }
74 +                             scope 20 (inlined #[track_caller] Option::<()>::expect) {
- +                                 let mut _43: isize;
- +                                 let mut _44: !;
+ +                                 let mut _41: isize;
+ +                                 let mut _42: !;
77 +                                 scope 21 {
78 +                                 }
79 +                             }

80 +                         }
81 +                     }
82 +                     scope 10 (inlined ready::<()>) {
- +                         let mut _33: std::option::Option<()>;
84 +                     }
85 +                     scope 11 (inlined <std::future::Ready<()> as IntoFuture>::into_future) {
86 +                     }

170 +         StorageLive(_13);
171 +         StorageLive(_14);
172 +         _14 = ();
- +         StorageLive(_33);
- +         _33 = Option::<()>::Some(copy _14);
- +         _13 = std::future::Ready::<()>(move _33);
- +         StorageDead(_33);
+ +         (_13.0: std::option::Option<()>) = Option::<()>::Some(copy _14);
177 +         StorageDead(_14);
178 +         _12 = move _13;
179 +         StorageDead(_13);

200 +         _23 = move _24;
201 +         _22 = &mut (*_23);
202 +         StorageDead(_24);
+ +         StorageLive(_38);
+ +         _38 = &raw mut _19;
203 +         StorageLive(_37);
- +         StorageLive(_39);
- +         StorageLive(_44);
- +         StorageLive(_34);
+ +         _37 = copy _38 as *mut std::pin::helper::PinHelper<&mut std::future::Ready<()>> (PtrToPtr);
+ +         StorageDead(_38);
207 +         StorageLive(_35);
+ +         _35 = no_retag copy ((*_37).0: &mut std::future::Ready<()>);
+ +         StorageDead(_37);
208 +         StorageLive(_40);
- +         _40 = &raw mut _19;
- +         _39 = copy _40 as *mut std::pin::helper::PinHelper<&mut std::future::Ready<()>> (PtrToPtr);
+ +         _40 = Option::<()>::None;
+ +         StorageLive(_33);
+ +         _33 = copy ((*_35).0: std::option::Option<()>);
+ +         ((*_35).0: std::option::Option<()>) = move _40;
+ +         StorageDead(_35);
211 +         StorageDead(_40);
- +         _37 = no_retag copy ((*_39).0: &mut std::future::Ready<()>);
- +         StorageLive(_42);
- +         _42 = Option::<()>::None;
- +         _35 = copy ((*_37).0: std::option::Option<()>);
- +         ((*_37).0: std::option::Option<()>) = move _42;
- +         StorageDead(_42);
- +         StorageLive(_43);
- +         _43 = discriminant(_35);
- +         switchInt(move _43) -> [0: bb16, 1: bb17, otherwise: bb7];
+ +         StorageLive(_41);
+ +         _41 = discriminant(_33);
+ +         switchInt(move _41) -> [0: bb16, 1: bb17, otherwise: bb18];
221       }
222   
223 -     bb6 (cleanup): {

299 +     }
300 + 
301 +     bb16: {
- +         _44 = option::expect_failed(const "`Ready` polled after completion") -> bb11;
+ +         StorageDead(_33);
+ +         StorageDead(_41);
+ +         StorageLive(_42);
+ +         _42 = option::expect_failed(const "`Ready` polled after completion") -> bb11;
303 +     }
304 + 
305 +     bb17: {

- +         _34 = move ((_35 as Some).0: ());
- +         StorageDead(_43);
- +         StorageDead(_35);
- +         _18 = Poll::<()>::Ready(move _34);
- +         StorageDead(_34);
- +         StorageDead(_44);
- +         StorageDead(_39);
- +         StorageDead(_37);
+ +         StorageDead(_41);
+ +         _18 = Poll::<()>::Ready(move ((_33 as Some).0: ()));
+ +         StorageDead(_33);
314 +         StorageDead(_22);
315 +         StorageDead(_19);
316 +         _25 = discriminant(_18);

317 +         switchInt(move _25) -> [0: bb9, 1: bb8, otherwise: bb7];
+ +     }
+ + 
+ +     bb18: {
+ +         StorageDead(_33);
+ +         StorageDead(_41);
+ +         unreachable;
318 +     }
319 + }
320 + 


thread '[mir-opt] tests/mir-opt/inline_coroutine_body.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/inline_coroutine_body.run2-{closure#0}.Inline.panic-unwind.diff
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
22           StorageLive(_2);
23           _2 = copy _1;
24           StorageLive(_3);
-           StorageLive(_4);
26           _3 = discriminant(_2);
27           switchInt(move _3) -> [0: bb2, 1: bb3, otherwise: bb1];
28       }

29   
30       bb1: {
+           StorageDead(_3);
---
+           StorageDead(_3);
35 -         assume(UbChecks);
36 +         assume(const false);
+           StorageLive(_4);
37           _4 = unreachable_unchecked::precondition_check() -> [return: bb1, unwind unreachable];
38       }
39   

40       bb3: {
-           _0 = move ((_2 as Some).0: i32);
-           StorageDead(_4);
43           StorageDead(_3);
+           _0 = move ((_2 as Some).0: i32);
44           StorageDead(_2);
45           return;
46       }


thread '[mir-opt] tests/mir-opt/instsimplify/ub_check.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/instsimplify/ub_check.unwrap_unchecked.InstSimplify-after-simplifycfg.diff
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
48     }
49 

50     bb5: {
-         _0 = move ((_4 as Some).0: u32);
52         StorageDead(_5);
+         _0 = move ((_4 as Some).0: u32);
53         StorageDead(_4);
54         goto -> bb8;
55     }

56 
---
59     }
60 


thread '[mir-opt] tests/mir-opt/issues/issue_59352.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/issues/issue_59352.num_to_digit.PreCodegen.after.64bit.panic-unwind.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
15       scope 1 {
16           debug residual => _6;
17           scope 2 {

18               scope 8 (inlined #[track_caller] <Result<i32, i32> as FromResidual<Result<Infallible, i32>>>::from_residual) {
-                   let mut _14: isize;
-                   let _15: i32;
-                   let mut _16: i32;
-                   let mut _17: bool;
+                   let mut _11: isize;
+                   let mut _12: bool;
23                   scope 9 {
24                       scope 10 (inlined <i32 as From<i32>>::from) {
25                       }

34       }
35       scope 5 (inlined <Result<i32, i32> as Try>::branch) {
36           let mut _10: isize;
-           let _11: i32;
-           let _12: i32;
-           let mut _13: std::result::Result<std::convert::Infallible, i32>;
40           scope 6 {
41           }
42           scope 7 {

50           _4 = copy _1;
51           StorageLive(_10);
52           _10 = discriminant(_4);
-           switchInt(move _10) -> [0: bb7, 1: bb6, otherwise: bb1];
+           switchInt(move _10) -> [0: bb8, 1: bb7, otherwise: bb6];
54       }
55   
56       bb1: {

73           _6 = copy ((_3 as Break).0: std::result::Result<std::convert::Infallible, i32>);
74           StorageLive(_8);
75           _8 = copy _6;
+           StorageLive(_11);
+           _11 = discriminant(_8);
+           StorageLive(_12);
+           _12 = Eq(copy _11, const 1_isize);
+           StorageDead(_11);
+           assume(move _12);
+           StorageDead(_12);
+           StorageLive(_13);
76           StorageLive(_14);
-           StorageLive(_17);
-           _14 = discriminant(_8);
-           _17 = Eq(copy _14, const 1_isize);
-           assume(move _17);
-           StorageLive(_15);
-           _15 = move ((_8 as Err).0: i32);
-           StorageLive(_16);
-           _16 = move _15;
-           _0 = Result::<i32, i32>::Err(move _16);
-           StorageDead(_16);
-           StorageDead(_15);
-           StorageDead(_17);
+           _14 = move ((_8 as Err).0: i32);
+           _13 = move _14;
+           ((_0 as variant#1).0: i32) = move _13;
89           StorageDead(_14);
+           StorageDead(_13);
+           discriminant(_0) = 1;
90           StorageDead(_8);
91           StorageDead(_6);
92           StorageDead(_2);

99       }
100   
101       bb5: {
-           StorageDead(_10);
103           StorageDead(_4);
104           _5 = discriminant(_3);
105           switchInt(move _5) -> [0: bb2, 1: bb3, otherwise: bb1];

106       }
107   
108       bb6: {
-           StorageLive(_12);
-           _12 = move ((_4 as Err).0: i32);
-           StorageLive(_13);
-           _13 = Result::<Infallible, i32>::Err(copy _12);
-           _3 = ControlFlow::<Result<Infallible, i32>, i32>::Break(move _13);
-           StorageDead(_13);
-           StorageDead(_12);
- -         goto -> bb5;
- +         goto -> bb8;
+           StorageDead(_10);
+           unreachable;
118       }
119   
120       bb7: {

-           StorageLive(_11);
-           _11 = move ((_4 as Ok).0: i32);
-           _3 = ControlFlow::<Result<Infallible, i32>, i32>::Continue(copy _11);
-           StorageDead(_11);
+           StorageDead(_10);
+           ((_3 as variant#1).0: std::result::Result<std::convert::Infallible, i32>) = Result::<Infallible, i32>::Err(copy ((_4 as Err).0: i32));
+           discriminant(_3) = 1;
125 -         goto -> bb5;
126 +         goto -> bb9;
+       }
+   
+       bb8: {
+           StorageDead(_10);
+           _3 = ControlFlow::<Result<Infallible, i32>, i32>::Continue(copy ((_4 as Ok).0: i32));
+ -         goto -> bb5;
+ +         goto -> bb10;
127 +     }
128 + 
- +     bb8: {
- +         StorageDead(_10);
+ +     bb9: {
131 +         StorageDead(_4);
132 +         _5 = discriminant(_3);
133 +         goto -> bb3;

134 +     }
135 + 
- +     bb9: {
- +         StorageDead(_10);
+ +     bb10: {
138 +         StorageDead(_4);
139 +         _5 = discriminant(_3);
140 +         goto -> bb2;


thread '[mir-opt] tests/mir-opt/jump_threading.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/jump_threading.identity.JumpThreading.panic-unwind.diff
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
26         StorageLive(_4);

27         _4 = copy ((*_2).0: u32);
+         StorageLive(_5);
28         _5 = Eq(move _3, move _4);
+         StorageDead(_3);
+         StorageDead(_4);
29         switchInt(move _5) -> [0: bb1, otherwise: bb2];
30     }
31 

32     bb1: {
-         StorageDead(_4);
---
44         StorageLive(_7);

45         _7 = copy ((*_2).1: u32);
+         StorageLive(_8);
46         _8 = Eq(move _6, move _7);
+         StorageDead(_6);
+         StorageDead(_7);
47         switchInt(move _8) -> [0: bb3, otherwise: bb4];
48     }
49 

50     bb3: {
-         StorageDead(_7);
---
62         StorageLive(_10);

63         _10 = copy ((*_2).2: u32);
+         StorageLive(_11);
64         _11 = Eq(move _9, move _10);
+         StorageDead(_9);
+         StorageDead(_10);
65         switchInt(move _11) -> [0: bb5, otherwise: bb6];
66     }
67 

68     bb5: {
-         StorageDead(_10);
---
80         StorageLive(_13);

81         _13 = copy ((*_2).3: u32);
+         StorageLive(_14);
82         _14 = Eq(move _12, move _13);
+         StorageDead(_12);
+         StorageDead(_13);
83         switchInt(move _14) -> [0: bb7, otherwise: bb9];
84     }
85 

86     bb7: {
-         StorageDead(_13);
---
100         StorageLive(_15);
101         _15 = copy ((*_1).4: u32);
102         StorageLive(_16);

103         _16 = copy ((*_2).4: u32);
104         _0 = Eq(move _15, move _16);
-         StorageDead(_16);
106         StorageDead(_15);
+         StorageDead(_16);
107         goto -> bb10;
108     }
---
116     }
117 }


thread '[mir-opt] tests/mir-opt/pre-codegen/chained_comparison.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/chained_comparison.naive.PreCodegen.after.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/pre-codegen/chained_comparison.rs stdout end ----
---- [mir-opt] tests/mir-opt/pre-codegen/checked_ops.rs stdout ----
5     debug n => _2;
6     let mut _0: u16;
7     scope 1 (inlined <u16 as Step>::forward) {
-         let mut _8: u16;
+         let mut _7: u16;
9         scope 2 {
10         }
11         scope 3 (inlined <u16 as Step>::forward_checked) {

+             let mut _4: std::result::Result<u16, std::num::TryFromIntError>;
12             scope 4 {
13                 scope 6 (inlined core::num::<impl u16>::checked_add) {
14                     let mut _5: (u16, bool);

-                     let mut _6: bool;
16                     scope 7 (inlined std::intrinsics::unlikely) {
-                         let _7: ();
+                         let _6: ();
18                     }
19                 }
20             }

21             scope 5 (inlined convert::num::ptr_try_from_impls::<impl TryFrom<usize> for u16>::try_from) {
22                 let mut _3: bool;
-                 let mut _4: u16;
24             }
25         }
26         scope 8 (inlined Option::<u16>::is_none) {

34     }
35 
36     bb0: {
-         StorageLive(_4);
38         StorageLive(_3);
39         _3 = Gt(copy _2, const 65535_usize);
-         switchInt(move _3) -> [0: bb1, otherwise: bb5];
+         switchInt(move _3) -> [0: bb1, otherwise: bb4];
41     }
42 
43     bb1: {

-         _4 = copy _2 as u16 (IntToInt);
45         StorageDead(_3);
-         StorageLive(_6);
+         StorageLive(_4);
+         ((_4 as variant#0).0: u16) = copy _2 as u16 (IntToInt);
+         discriminant(_4) = 0;
47         StorageLive(_5);
-         _5 = AddWithOverflow(copy _1, copy _4);
-         _6 = copy (_5.1: bool);
-         switchInt(copy _6) -> [0: bb2, otherwise: bb3];
+         _5 = AddWithOverflow(copy _1, copy ((_4 as Ok).0: u16));
+         StorageDead(_4);
+         switchInt(copy (_5.1: bool)) -> [0: bb2, otherwise: bb3];
51     }
52 
53     bb2: {

54         StorageDead(_5);
-         StorageDead(_6);
-         goto -> bb7;
+         goto -> bb6;
57     }
58 
59     bb3: {

-         _7 = std::intrinsics::cold_path() -> [return: bb4, unwind unreachable];
+         StorageDead(_5);
+         StorageLive(_6);
+         _6 = std::intrinsics::cold_path() -> [return: bb5, unwind unreachable];
61     }
62 
63     bb4: {

-         StorageDead(_5);
---

-         StorageDead(_3);
-         goto -> bb6;
+         StorageDead(_6);
+         assert(!const true, "attempt to compute `{} + {}`, which would overflow", const u16::MAX, const 1_u16) -> [success: bb6, unwind continue];
72     }
73 
74     bb6: {

-         assert(!const true, "attempt to compute `{} + {}`, which would overflow", const u16::MAX, const 1_u16) -> [success: bb7, unwind continue];
-     }
- 
-     bb7: {
-         StorageLive(_8);
-         _8 = copy _2 as u16 (IntToInt);
---
85     }
86 }


thread '[mir-opt] tests/mir-opt/pre-codegen/checked_ops.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/checked_ops.step_forward.PreCodegen.after.panic-unwind.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
29 
30     bb2: {
+         StorageDead(_2);
31         StorageLive(_3);
32         _3 = discriminant(((_1 as Some).0: std::cmp::Ordering));
33         _0 = Eq(copy _3, const 0_i8);

36     }
37 
38     bb3: {
-         StorageDead(_2);
---
45     }
46 }


thread '[mir-opt] tests/mir-opt/pre-codegen/const_promotion_option_ordering_eq.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/const_promotion_option_ordering_eq.direct.PreCodegen.after.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
14 
15     bb0: {
-         StorageLive(_3);
+         StorageLive(_2);
17         _2 = no_retag copy (*_1);
+         StorageLive(_3);
18         _3 = copy (*_2);
+         StorageLive(_4);
+         StorageDead(_2);
19         _4 = unknown() -> [return: bb1, unwind continue];
20     }
21 

22     bb1: {
-         StorageLive(_6);
+         StorageDead(_4);
+         StorageLive(_5);
24         _5 = no_retag copy (*_1);
+         StorageLive(_6);
25         _6 = copy (*_5);
+         StorageDead(_5);
26         _0 = Eq(move _6, copy _3);
-         StorageDead(_6);
28         StorageDead(_3);
+         StorageDead(_6);
29         return;
30     }
31 }


thread '[mir-opt] tests/mir-opt/pre-codegen/deref_nested_borrows.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/deref_nested_borrows.src.PreCodegen.after.panic-unwind.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
22     bb0: {

24         _3 = copy ((*_1).0: char);
25         StorageLive(_4);
26         _4 = copy ((*_2).0: char);
-         _5 = Cmp(move _3, move _4);
-         StorageDead(_4);
+         ((_0 as variant#1).0: std::cmp::Ordering) = Cmp(move _3, move _4);
29         StorageDead(_3);
-         _0 = Option::<std::cmp::Ordering>::Some(copy _5);
-         _6 = discriminant(_5);
-         switchInt(move _6) -> [0: bb1, otherwise: bb2];
+         StorageDead(_4);
+         discriminant(_0) = 1;
+         StorageLive(_5);
+         _5 = discriminant(((_0 as Some).0: std::cmp::Ordering));
+         switchInt(move _5) -> [0: bb1, otherwise: bb2];
33     }
34 
35     bb1: {

-         StorageLive(_9);
+         StorageDead(_5);
+         StorageLive(_6);
+         _6 = copy ((*_1).1: i16);
37         StorageLive(_7);
-         _7 = copy ((*_1).1: i16);
-         StorageLive(_8);
-         _8 = copy ((*_2).1: i16);
-         _9 = Cmp(move _7, move _8);
-         StorageDead(_8);
+         _7 = copy ((*_2).1: i16);
+         ((_0 as variant#1).0: std::cmp::Ordering) = Cmp(move _6, move _7);
+         StorageDead(_6);
43         StorageDead(_7);
-         _0 = Option::<std::cmp::Ordering>::Some(move _9);
-         StorageDead(_9);
+         discriminant(_0) = 1;
46         goto -> bb3;
47     }
48 
---
51     }
52 


thread '[mir-opt] tests/mir-opt/pre-codegen/derived_ord.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/derived_ord.{impl#0}-partial_cmp.PreCodegen.after.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/pre-codegen/derived_ord.rs stdout end ----
---- [mir-opt] tests/mir-opt/pre-codegen/drop_box_of_sized.rs stdout ----
6     scope 1 (inlined drop_in_place::<Box<T>> - shim(Some(Box<T>))) {
7         scope 2 (inlined <Box<T> as Drop>::drop) {
8             let _2: std::ptr::NonNull<T>;
+             let mut _3: std::mem::Alignment;
+             let mut _4: std::ptr::NonNull<u8>;
9             let _5: ();
10             scope 3 {
11                 scope 4 {

12                     scope 17 (inlined Layout::size) {
13                     }
14                     scope 18 (inlined std::ptr::Unique::<T>::cast::<u8>) {
-                         let mut _4: std::ptr::NonNull<u8>;
16                         scope 19 (inlined NonNull::<T>::cast::<u8>) {
17                             scope 20 (inlined NonNull::<T>::as_ptr) {
18                             }

42                     }
43                 }
44                 scope 7 (inlined Layout::for_value_raw::<T>) {
-                     let mut _3: std::mem::Alignment;
46                     scope 8 {
47                         scope 16 (inlined #[track_caller] Layout::from_size_alignment_unchecked) {
48                         }

67     }
68 
69     bb0: {
-         StorageLive(_4);
71         StorageLive(_2);
72         _2 = copy (((*_1).0: std::ptr::Unique<T>).0: std::ptr::NonNull<T>);
+         StorageLive(_3);
73         _3 = const <T as std::mem::SizedTypeProperties>::ALIGN as std::mem::Alignment (Transmute);
-         switchInt(const <T as std::mem::SizedTypeProperties>::SIZE) -> [0: bb3, otherwise: bb1];
+         switchInt(const <T as std::mem::SizedTypeProperties>::SIZE) -> [0: bb1, otherwise: bb2];
75     }
76 
77     bb1: {

-         _4 = copy _2 as std::ptr::NonNull<u8> (Transmute);
-         switchInt(const <T as std::mem::SizedTypeProperties>::SIZE) -> [0: bb3, otherwise: bb2];
+         StorageDead(_2);
+         StorageDead(_3);
+         goto -> bb5;
80     }
81 
82     bb2: {

-         _5 = alloc::alloc::__rust_dealloc(move _4, const <T as std::mem::SizedTypeProperties>::SIZE, move _3) -> [return: bb3, unwind unreachable];
+         StorageLive(_4);
+         _4 = copy _2 as std::ptr::NonNull<u8> (Transmute);
+         StorageDead(_2);
+         switchInt(const <T as std::mem::SizedTypeProperties>::SIZE) -> [0: bb4, otherwise: bb3];
84     }
85 
86     bb3: {

-         StorageDead(_2);
+         StorageLive(_5);
+         _5 = alloc::alloc::__rust_dealloc(move _4, const <T as std::mem::SizedTypeProperties>::SIZE, move _3) -> [return: bb4, unwind unreachable];
+     }
+ 
+     bb4: {
+         StorageDead(_5);
88         StorageDead(_4);
---
90     }
91 }


thread '[mir-opt] tests/mir-opt/pre-codegen/drop_box_of_sized.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/drop_box_of_sized.drop_generic.PreCodegen.after.panic-unwind.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
20                             scope 20 (inlined NonNull::<[T]>::as_ptr) {

45                     }
46                 }
47                 scope 7 (inlined Layout::for_value_raw::<[T]>) {
-                     let mut _5: usize;
-                     let mut _6: std::mem::Alignment;
50                     scope 8 {
51                         scope 16 (inlined #[track_caller] Layout::from_size_alignment_unchecked) {
52                         }

71     }
72 
73     bb0: {
-         StorageLive(_3);
-         StorageLive(_5);
-         StorageLive(_8);
77         StorageLive(_2);
78         _2 = copy (((*_1).0: std::ptr::Unique<[T]>).0: std::ptr::NonNull<[T]>);
-         StorageLive(_4);
+         StorageLive(_3);
80         _3 = copy _2 as *mut [T] (Transmute);
+         StorageLive(_4);
81         _4 = copy _2 as *const [T] (Transmute);
+         StorageDead(_2);
+         StorageLive(_5);
82         _5 = std::intrinsics::size_of_val::<[T]>(move _4) -> [return: bb1, unwind unreachable];
83     }
84 

85     bb1: {
-         _6 = const <T as std::mem::SizedTypeProperties>::ALIGN as std::mem::Alignment (Transmute);
87         StorageDead(_4);
-         switchInt(copy _5) -> [0: bb3, otherwise: bb2];
+         StorageLive(_6);
+         _6Bootstrap failed while executing `--stage 2 test --skip tidy --skip compiler --skip src`
 = const <T as std::mem::SizedTypeProperties>::ALIGN as std::mem::Alignment (Transmute);
+         switchInt(copy _5) -> [0: bb2, otherwise: bb3];
89     }
90 
91     bb2: {

+         StorageDead(_3);
+         StorageDead(_5);
+         StorageDead(_6);
+         goto -> bb5;
+     }
+ 
+     bb3: {
92         StorageLive(_7);
93         _7 = copy _3 as *mut u8 (PtrToPtr);
+         StorageDead(_3);
+         StorageLive(_8);
94         _8 = copy _7 as std::ptr::NonNull<u8> (Transmute);
95         StorageDead(_7);
-         _9 = alloc::alloc::__rust_dealloc(move _8, move _5, move _6) -> [return: bb3, unwind unreachable];
+         StorageLive(_9);
+         _9 = alloc::alloc::__rust_dealloc(move _8, move _5, move _6) -> [return: bb4, unwind unreachable];
97     }
98 
-     bb3: {
-         StorageDead(_2);
+     bb4: {
---
105     }
106 }


thread '[mir-opt] tests/mir-opt/pre-codegen/drop_boxed_slice.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/drop_boxed_slice.generic_in_place.PreCodegen.after.64bit.panic-unwind.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
13     }
14 
15     bb0: {
+         StorageLive(_2);
16         _2 = discriminant(_1);
+         StorageLive(_3);
17         _3 = Eq(copy _2, const 0_isize);
+         StorageDead(_2);
18         assume(move _3);
+         StorageDead(_3);
19         _0 = move _1;
20         return;
21     }


thread '[mir-opt] tests/mir-opt/pre-codegen/duplicate_switch_targets.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/duplicate_switch_targets.ub_if_b.PreCodegen.after.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
9     }
10 
11     bb0: {
+         StorageLive(_1);
12         _1 = f_zst::<()>(const ()) -> [return: bb1, unwind unreachable];
13     }
14 

15     bb1: {
+         StorageDead(_1);
16         return;
17     }
18 }


thread '[mir-opt] tests/mir-opt/pre-codegen/intrinsics.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/intrinsics.f_unit.PreCodegen.after.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/pre-codegen/intrinsics.rs stdout end ----
---- [mir-opt] tests/mir-opt/pre-codegen/copy_and_clone.rs#COPY stdout ----
------FileCheck stdout------------------------------

------FileCheck stderr------------------------------
/checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:10:12: error: CHECK: expected string not found in input
 // CHECK: _0 = Av1BlockIntraInter::Intra(move [[C]]);
           ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir:21:52: note: scanning from here
 ((_0 as variant#0).0: Av1BlockIntra) = copy (*_1);
                                                   ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir:21:52: note: with "C" equal to "_0 as variant#0).0: Av1BlockIntra)"
 ((_0 as variant#0).0: Av1BlockIntra) = copy (*_1);
                                                   ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir:27:1: note: possible intended match here
fn inter_clone(_1: &Av1BlockInter) -> Av1BlockIntraInter {
^
/checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:18:12: error: CHECK: expected string not found in input
 // CHECK: _0 = Av1BlockIntraInter::Inter(move [[C]]);
           ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir:54:52: note: scanning from here
 ((_0 as variant#1).0: Av1BlockInter) = copy (*_1);
                                                   ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir:54:52: note: with "C" equal to "_0 as variant#1).0: Av1BlockInter)"
 ((_0 as variant#1).0: Av1BlockInter) = copy (*_1);
                                                   ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir:60:1: note: possible intended match here
fn dav1dsequenceheader_copy(_1: &Dav1dSequenceHeader) -> Dav1dSequenceHeader {
^

Input file: /checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir
Check file: /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs

-dump-input=help explains the following input dump.

Input was:
<<<<<<
            1: // WARNING: This output format is intended for human consumers only 
            2: // and is subject to change without notice. Knock yourself out. 
            3: // HINT: See also -Z dump-mir for MIR at specific points during compilation. 
            4: fn intra_clone(_1: &Av1BlockIntra) -> Av1BlockIntraInter { 
            5:  debug intra => _1; 
            6:  let mut _0: Av1BlockIntraInter; 
            7:  scope 1 (inlined <Av1BlockIntra as Clone>::clone) { 
            8:  scope 2 { 
            9:  scope 3 { 
           10:  scope 4 { 
           11:  scope 5 { 
           12:  scope 6 { 
           13:  } 
           14:  } 
           15:  } 
           16:  } 
           17:  } 
           18:  } 
           19:  
           20:  bb0: { 
           21:  ((_0 as variant#0).0: Av1BlockIntra) = copy (*_1); 
check:10'0                                                        X error: no match found
check:10'1                                                          with "C" equal to "_0 as variant#0).0: Av1BlockIntra)"
           22:  discriminant(_0) = 0; 
check:10'0     ~~~~~~~~~~~~~~~~~~~~~~~
           23:  return; 
check:10'0     ~~~~~~~~~
           24:  } 
check:10'0     ~~~
           25: } 
check:10'0     ~~
           26:  
check:10'0     ~
           27: fn inter_clone(_1: &Av1BlockInter) -> Av1BlockIntraInter { 
check:10'0     ~~~~~~~~~~~~~~~
check:10'2     ?                                                           possible intended match
           28:  debug inter => _1; 
           29:  let mut _0: Av1BlockIntraInter; 
           30:  scope 1 (inlined <Av1BlockInter as Clone>::clone) { 
           31:  scope 2 { 
           32:  scope 3 { 
           33:  scope 4 { 
           34:  scope 5 { 
           35:  scope 6 { 
           36:  scope 7 { 
           37:  scope 8 { 
           38:  scope 9 { 
           39:  scope 10 { 
           40:  scope 11 { 
           41:  } 
           42:  } 
           43:  } 
           44:  } 
           45:  } 
           46:  } 
           47:  } 
           48:  } 
           49:  } 
           50:  } 
           51:  } 
           52:  
           53:  bb0: { 
           54:  ((_0 as variant#1).0: Av1BlockInter) = copy (*_1); 
check:18'0                                                        X error: no match found
check:18'1                                                          with "C" equal to "_0 as variant#1).0: Av1BlockInter)"
           55:  discriminant(_0) = 1; 
check:18'0     ~~~~~~~~~~~~~~~~~~~~~~~
           56:  return; 
check:18'0     ~~~~~~~~~
           57:  } 
check:18'0     ~~~
           58: } 
check:18'0     ~~
           59:  
check:18'0     ~
           60: fn dav1dsequenceheader_copy(_1: &Dav1dSequenceHeader) -> Dav1dSequenceHeader { 
check:18'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:18'2     ?                                                                               possible intended match
           61:  debug v => _1; 
           62:  let mut _0: Dav1dSequenceHeader; 
           63:  scope 1 (inlined <Dav1dSequenceHeader as Clone>::clone) { 
           64:  scope 2 { 
           65:  scope 3 { 
           66:  scope 4 { 
           67:  scope 5 { 
           68:  scope 6 { 
           69:  scope 7 { 
           70:  scope 8 { 
           71:  scope 9 { 
           72:  scope 10 { 
           73:  scope 11 { 
           74:  scope 12 { 
           75:  } 
           76:  } 
           77:  } 
           78:  } 
           79:  } 
           80:  } 
           81:  } 
           82:  } 
           83:  } 
           84:  } 
           85:  } 
           86:  } 
           87:  
           88:  bb0: { 
           89:  _0 = copy (*_1); 
           90:  return; 
           91:  } 
           92: } 
           93:  
           94: fn <impl at /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:29:10: 29:15>::clone(_1: &mv) -> mv { 
           95:  debug self => _1; 
           96:  let mut _0: mv; 
           97:  scope 1 { 
           98:  } 
           99:  
          100:  bb0: { 
          101:  _0 = copy (*_1); 
          102:  return; 
          103:  } 
          104: } 
          105:  
          106: fn <impl at /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:36:10: 36:15>::clone(_1: &MaskedInterIntraPredMode) -> MaskedInterIntraPredMode { 
          107:  debug self => _1; 
          108:  let mut _0: MaskedInterIntraPredMode; 
          109:  scope 1 { 
          110:  } 
          111:  
          112:  bb0: { 
          113:  _0 = copy (*_1); 
          114:  return; 
          115:  } 
          116: } 
          117:  
          118: const Av1BlockInter1d::mv::{constant#0}: usize = const 2_usize; 
          119:  
          120: fn <impl at /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:40:10: 40:15>::clone(_1: &Av1BlockInter1d) -> Av1BlockInter1d { 
          121:  debug self => _1; 
          122:  let mut _0: Av1BlockInter1d; 
          123:  scope 1 (inlined array::<impl Clone for [mv; 2]>::clone) { 
          124:  scope 2 (inlined <mv as array::SpecArrayClone>::clone::<2>) { 
          125:  scope 3 (inlined #[track_caller] std::ptr::read::<[mv; 2]>) { 
          126:  scope 4 (inlined core::ub_checks::check_language_ub) { 
          127:  scope 5 (inlined core::ub_checks::check_language_ub::runtime) { 
          128:  } 
          129:  } 
          130:  scope 6 (inlined std::mem::align_of::<[mv; 2]>) { 
          131:  } 
          132:  } 
          133:  } 
          134:  } 
          135:  scope 7 (inlined <MaskedInterIntraPredMode as Clone>::clone) { 
          136:  scope 8 { 
          137:  } 
          138:  } 
          139:  
          140:  bb0: { 
          141:  _0 = copy (*_1); 
          142:  return; 
          143:  } 
          144: } 
          145:  
          146: fn <impl at /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:51:10: 51:15>::clone(_1: &Av1BlockInterNd) -> Av1BlockInterNd { 
          147:  debug self => _1; 
          148:  let mut _0: Av1BlockInterNd; 
          149:  scope 1 (inlined <Av1BlockInter1d as Clone>::clone) { 
          150:  scope 2 (inlined array::<impl Clone for [mv; 2]>::clone) { 
          151:  scope 3 (inlined <mv as array::SpecArrayClone>::clone::<2>) { 
          152:  scope 4 (inlined #[track_caller] std::ptr::read::<[mv; 2]>) { 
          153:  scope 5 (inlined core::ub_checks::check_language_ub) { 
          154:  scope 6 (inlined core::ub_checks::check_language_ub::runtime) { 
          155:  } 
          156:  } 
          157:  scope 7 (inlined std::mem::align_of::<[mv; 2]>) { 
          158:  } 
          159:  } 
          160:  } 
            .
            .
            .
>>>>>>

------------------------------------------

error in revision `COPY`: verification with 'FileCheck' failed
status: exit status: 1
command: "/usr/lib/llvm-21/bin/FileCheck" "--input-file" "/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir" "/checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs" "--check-prefix=CHECK" "--check-prefix" "COPY" "--allow-unused-prefixes" "--dump-input-context" "100"
stdout: none
--- stderr -------------------------------
/checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:10:12: error: CHECK: expected string not found in input
 // CHECK: _0 = Av1BlockIntraInter::Intra(move [[C]]);
           ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir:21:52: note: scanning from here
 ((_0 as variant#0).0: Av1BlockIntra) = copy (*_1);
                                                   ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir:21:52: note: with "C" equal to "_0 as variant#0).0: Av1BlockIntra)"
 ((_0 as variant#0).0: Av1BlockIntra) = copy (*_1);
                                                   ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir:27:1: note: possible intended match here
fn inter_clone(_1: &Av1BlockInter) -> Av1BlockIntraInter {
^
/checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:18:12: error: CHECK: expected string not found in input
 // CHECK: _0 = Av1BlockIntraInter::Inter(move [[C]]);
           ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir:54:52: note: scanning from here
 ((_0 as variant#1).0: Av1BlockInter) = copy (*_1);
                                                   ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir:54:52: note: with "C" equal to "_0 as variant#1).0: Av1BlockInter)"
 ((_0 as variant#1).0: Av1BlockInter) = copy (*_1);
                                                   ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir:60:1: note: possible intended match here
fn dav1dsequenceheader_copy(_1: &Dav1dSequenceHeader) -> Dav1dSequenceHeader {
^

Input file: /checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.COPY/copy_and_clone.mir
Check file: /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs

-dump-input=help explains the following input dump.

Input was:
<<<<<<
            1: // WARNING: This output format is intended for human consumers only 
            2: // and is subject to change without notice. Knock yourself out. 
            3: // HINT: See also -Z dump-mir for MIR at specific points during compilation. 
            4: fn intra_clone(_1: &Av1BlockIntra) -> Av1BlockIntraInter { 
            5:  debug intra => _1; 
            6:  let mut _0: Av1BlockIntraInter; 
            7:  scope 1 (inlined <Av1BlockIntra as Clone>::clone) { 
            8:  scope 2 { 
            9:  scope 3 { 
           10:  scope 4 { 
           11:  scope 5 { 
           12:  scope 6 { 
           13:  } 
           14:  } 
           15:  } 
           16:  } 
           17:  } 
           18:  } 
           19:  
           20:  bb0: { 
           21:  ((_0 as variant#0).0: Av1BlockIntra) = copy (*_1); 
check:10'0                                                        X error: no match found
check:10'1                                                          with "C" equal to "_0 as variant#0).0: Av1BlockIntra)"
           22:  discriminant(_0) = 0; 
check:10'0     ~~~~~~~~~~~~~~~~~~~~~~~
           23:  return; 
check:10'0     ~~~~~~~~~
           24:  } 
check:10'0     ~~~
           25: } 
check:10'0     ~~
           26:  
check:10'0     ~
           27: fn inter_clone(_1: &Av1BlockInter) -> Av1BlockIntraInter { 
check:10'0     ~~~~~~~~~~~~~~~
check:10'2     ?                                                           possible intended match
           28:  debug inter => _1; 
           29:  let mut _0: Av1BlockIntraInter; 
           30:  scope 1 (inlined <Av1BlockInter as Clone>::clone) { 
           31:  scope 2 { 
           32:  scope 3 { 
           33:  scope 4 { 
           34:  scope 5 { 
           35:  scope 6 { 
           36:  scope 7 { 
           37:  scope 8 { 
           38:  scope 9 { 
           39:  scope 10 { 
           40:  scope 11 { 
           41:  } 
           42:  } 
           43:  } 
           44:  } 
           45:  } 
           46:  } 
           47:  } 
           48:  } 
           49:  } 
           50:  } 
           51:  } 
           52:  
           53:  bb0: { 
           54:  ((_0 as variant#1).0: Av1BlockInter) = copy (*_1); 
check:18'0                                                        X error: no match found
check:18'1                                                          with "C" equal to "_0 as variant#1).0: Av1BlockInter)"
           55:  discriminant(_0) = 1; 
check:18'0     ~~~~~~~~~~~~~~~~~~~~~~~
           56:  return; 
check:18'0     ~~~~~~~~~
           57:  } 
check:18'0     ~~~
           58: } 
check:18'0     ~~
           59:  
check:18'0     ~
           60: fn dav1dsequenceheader_copy(_1: &Dav1dSequenceHeader) -> Dav1dSequenceHeader { 
check:18'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:18'2     ?                                                                               possible intended match
           61:  debug v => _1; 
           62:  let mut _0: Dav1dSequenceHeader; 
           63:  scope 1 (inlined <Dav1dSequenceHeader as Clone>::clone) { 
           64:  scope 2 { 
           65:  scope 3 { 
           66:  scope 4 { 
           67:  scope 5 { 
           68:  scope 6 { 
           69:  scope 7 { 
           70:  scope 8 { 
           71:  scope 9 { 
           72:  scope 10 { 
           73:  scope 11 { 
           74:  scope 12 { 
           75:  } 
           76:  } 
           77:  } 
           78:  } 
           79:  } 
           80:  } 
           81:  } 
           82:  } 
           83:  } 
           84:  } 
           85:  } 
           86:  } 
           87:  
           88:  bb0: { 
           89:  _0 = copy (*_1); 
           90:  return; 
           91:  } 
           92: } 
           93:  
           94: fn <impl at /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:29:10: 29:15>::clone(_1: &mv) -> mv { 
           95:  debug self => _1; 
           96:  let mut _0: mv; 
           97:  scope 1 { 
           98:  } 
           99:  
          100:  bb0: { 
          101:  _0 = copy (*_1); 
          102:  return; 
          103:  } 
          104: } 
          105:  
          106: fn <impl at /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:36:10: 36:15>::clone(_1: &MaskedInterIntraPredMode) -> MaskedInterIntraPredMode { 
          107:  debug self => _1; 
          108:  let mut _0: MaskedInterIntraPredMode; 
          109:  scope 1 { 
          110:  } 
          111:  
          112:  bb0: { 
          113:  _0 = copy (*_1); 
          114:  return; 
          115:  } 
          116: } 
          117:  
          118: const Av1BlockInter1d::mv::{constant#0}: usize = const 2_usize; 
          119:  
          120: fn <impl at /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:40:10: 40:15>::clone(_1: &Av1BlockInter1d) -> Av1BlockInter1d { 
          121:  debug self => _1; 
          122:  let mut _0: Av1BlockInter1d; 
          123:  scope 1 (inlined array::<impl Clone for [mv; 2]>::clone) { 
          124:  scope 2 (inlined <mv as array::SpecArrayClone>::clone::<2>) { 
          125:  scope 3 (inlined #[track_caller] std::ptr::read::<[mv; 2]>) { 
          126:  scope 4 (inlined core::ub_checks::check_language_ub) { 
          127:  scope 5 (inlined core::ub_checks::check_language_ub::runtime) { 
          128:  } 
          129:  } 
          130:  scope 6 (inlined std::mem::align_of::<[mv; 2]>) { 
          131:  } 
          132:  } 
          133:  } 
          134:  } 
          135:  scope 7 (inlined <MaskedInterIntraPredMode as Clone>::clone) { 
          136:  scope 8 { 
          137:  } 
          138:  } 
          139:  
          140:  bb0: { 
          141:  _0 = copy (*_1); 
          142:  return; 
          143:  } 
          144: } 
          145:  
          146: fn <impl at /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:51:10: 51:15>::clone(_1: &Av1BlockInterNd) -> Av1BlockInterNd { 
          147:  debug self => _1; 
          148:  let mut _0: Av1BlockInterNd; 
          149:  scope 1 (inlined <Av1BlockInter1d as Clone>::clone) { 
          150:  scope 2 (inlined array::<impl Clone for [mv; 2]>::clone) { 
          151:  scope 3 (inlined <mv as array::SpecArrayClone>::clone::<2>) { 
          152:  scope 4 (inlined #[track_caller] std::ptr::read::<[mv; 2]>) { 
          153:  scope 5 (inlined core::ub_checks::check_language_ub) { 
          154:  scope 6 (inlined core::ub_checks::check_language_ub::runtime) { 
          155:  } 
          156:  } 
          157:  scope 7 (inlined std::mem::align_of::<[mv; 2]>) { 
          158:  } 
          159:  } 
          160:  } 
            .
            .
            .
>>>>>>
------------------------------------------

---- [mir-opt] tests/mir-opt/pre-codegen/copy_and_clone.rs#COPY stdout end ----
---- [mir-opt] tests/mir-opt/pre-codegen/copy_and_clone.rs#CLONE stdout ----
------FileCheck stdout------------------------------

------FileCheck stderr------------------------------
/checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:10:12: error: CHECK: expected string not found in input
 // CHECK: _0 = Av1BlockIntraInter::Intra(move [[C]]);
           ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.CLONE/copy_and_clone.mir:13:52: note: scanning from here
 ((_0 as variant#0).0: Av1BlockIntra) = copy (*_1);
                                                   ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.CLONE/copy_and_clone.mir:13:52: note: with "C" equal to "_0 as variant#0).0: Av1BlockIntra)"
 ((_0 as variant#0).0: Av1BlockIntra) = copy (*_1);
                                                   ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.CLONE/copy_and_clone.mir:19:1: note: possible intended match here
fn inter_clone(_1: &Av1BlockInter) -> Av1BlockIntraInter {
^
/checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:17:12: error: CHECK: expected string not found in input
 // CHECK: [[C:_.*]] = copy (*_1);
           ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.CLONE/copy_and_clone.mir:19:16: note: scanning from here
fn inter_clone(_1: &Av1BlockInter) -> Av1BlockIntraInter {
               ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.CLONE/copy_and_clone.mir:83:107: note: possible intended match here
 (((((_0 as variant#1).0: Av1BlockInter).1: std::option::Option<CompInterType>) as variant#1).0: CompInterType) = copy ((((*_1).1: std::option::Option<CompInterType>) as Some).0: CompInterType);
                                                                                                          ^

Input file: /checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.CLONE/copy_and_clone.mir
Check file: /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs

-dump-input=help explains the following input dump.

---
check:17'0     ~~~
          128: } 
check:17'0     ~~
          129:  
check:17'0     ~
          130: fn dav1dsequenceheader_copy(_1: &Dav1dSequenceHeader) -> Dav1dSequenceHeader { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          131:  debug v => _1; 
          132:  let mut _0: Dav1dSequenceHeader; 
          133:  scope 1 (inlined <Dav1dSequenceHeader as Clone>::clone) { 
          134:  scope 2 (inlined array::<impl Clone for [Dav1dSequenceHeaderOperatingPoint; 32]>::clone) { 
          135:  scope 3 (inlined <Dav1dSequenceHeaderOperatingPoint as array::SpecArrayClone>::clone::<32>) { 
          136:  scope 4 (inlined #[track_caller] std::ptr::read::<[Dav1dSequenceHeaderOperatingPoint; 32]>) { 
          137:  scope 5 (inlined core::ub_checks::check_language_ub) { 
          138:  scope 6 (inlined core::ub_checks::check_language_ub::runtime) { 
          139:  } 
          140:  } 
          141:  scope 7 (inlined std::mem::align_of::<[Dav1dSequenceHeaderOperatingPoint; 32]>) { 
          142:  } 
          143:  } 
          144:  } 
          145:  } 
          146:  scope 8 (inlined array::<impl Clone for [Dav1dSequenceHeaderOperatingParameterInfo; 32]>::clone) { 
          147:  scope 9 (inlined <Dav1dSequenceHeaderOperatingParameterInfo as array::SpecArrayClone>::clone::<32>) { 
          148:  scope 10 (inlined #[track_caller] std::ptr::read::<[Dav1dSequenceHeaderOperatingParameterInfo; 32]>) { 
          149:  scope 11 (inlined core::ub_checks::check_language_ub) { 
          150:  scope 12 (inlined core::ub_checks::check_language_ub::runtime) { 
          151:  } 
          152:  } 
          153:  scope 13 (inlined std::mem::align_of::<[Dav1dSequenceHeaderOperatingParameterInfo; 32]>) { 
          154:  } 
          155:  } 
          156:  } 
          157:  } 
          158:  } 
          159:  
          160:  bb0: { 
          161:  _0 = copy (*_1); 
          162:  return; 
          163:  } 
          164: } 
          165:  
          166: fn <impl at /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:29:10: 29:15>::clone(_1: &mv) -> mv { 
          167:  debug self => _1; 
          168:  let mut _0: mv; 
          169:  scope 1 { 
          170:  } 
          171:  
          172:  bb0: { 
          173:  _0 = copy (*_1); 
          174:  return; 
          175:  } 
          176: } 
          177:  
          178: fn <impl at /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:36:10: 36:15>::clone(_1: &MaskedInterIntraPredMode) -> MaskedInterIntraPredMode { 
          179:  debug self => _1; 
          180:  let mut _0: MaskedInterIntraPredMode; 
          181:  scope 1 { 
          182:  } 
          183:  
            .
            .
            .
>>>>>>

------------------------------------------

error in revision `CLONE`: verification with 'FileCheck' failed
status: exit status: 1
command: "/usr/lib/llvm-21/bin/FileCheck" "--input-file" "/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.CLONE/copy_and_clone.mir" "/checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs" "--check-prefix=CHECK" "--check-prefix" "CLONE" "--allow-unused-prefixes" "--dump-input-context" "100"
stdout: none
--- stderr -------------------------------
/checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:10:12: error: CHECK: expected string not found in input
 // CHECK: _0 = Av1BlockIntraInter::Intra(move [[C]]);
           ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.CLONE/copy_and_clone.mir:13:52: note: scanning from here
 ((_0 as variant#0).0: Av1BlockIntra) = copy (*_1);
                                                   ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.CLONE/copy_and_clone.mir:13:52: note: with "C" equal to "_0 as variant#0).0: Av1BlockIntra)"
 ((_0 as variant#0).0: Av1BlockIntra) = copy (*_1);
                                                   ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.CLONE/copy_and_clone.mir:19:1: note: possible intended match here
fn inter_clone(_1: &Av1BlockInter) -> Av1BlockIntraInter {
^
/checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:17:12: error: CHECK: expected string not found in input
 // CHECK: [[C:_.*]] = copy (*_1);
           ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.CLONE/copy_and_clone.mir:19:16: note: scanning from here
fn inter_clone(_1: &Av1BlockInter) -> Av1BlockIntraInter {
               ^
/checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.CLONE/copy_and_clone.mir:83:107: note: possible intended match here
 (((((_0 as variant#1).0: Av1BlockInter).1: std::option::Option<CompInterType>) as variant#1).0: CompInterType) = copy ((((*_1).1: std::option::Option<CompInterType>) as Some).0: CompInterType);
                                                                                                          ^

Input file: /checkout/obj/build/aarch64-unknown-linux-gnu/test/mir-opt/pre-codegen/copy_and_clone.CLONE/copy_and_clone.mir
Check file: /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs

-dump-input=help explains the following input dump.

Input was:
<<<<<<
            1: // WARNING: This output format is intended for human consumers only 
            2: // and is subject to change without notice. Knock yourself out. 
            3: // HINT: See also -Z dump-mir for MIR at specific points during compilation. 
            4: fn intra_clone(_1: &Av1BlockIntra) -> Av1BlockIntraInter { 
            5:  debug intra => _1; 
            6:  let mut _0: Av1BlockIntraInter; 
            7:  scope 1 (inlined <Av1BlockIntra as Clone>::clone) { 
            8:  scope 2 (inlined <TxfmSize as Clone>::clone) { 
            9:  } 
           10:  } 
           11:  
           12:  bb0: { 
           13:  ((_0 as variant#0).0: Av1BlockIntra) = copy (*_1); 
check:10'0                                                        X error: no match found
check:10'1                                                          with "C" equal to "_0 as variant#0).0: Av1BlockIntra)"
           14:  discriminant(_0) = 0; 
check:10'0     ~~~~~~~~~~~~~~~~~~~~~~~
           15:  return; 
check:10'0     ~~~~~~~~~
           16:  } 
check:10'0     ~~~
           17: } 
check:10'0     ~~
           18:  
check:10'0     ~
           19: fn inter_clone(_1: &Av1BlockInter) -> Av1BlockIntraInter { 
check:10'0     ~~~~~~~~~~~~~~~
check:10'2     ?                                                           possible intended match
check:17'0                    X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           20:  debug inter => _1; 
check:17'0     ~~~~~~~~~~~~~~~~~~~~
           21:  let mut _0: Av1BlockIntraInter; 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           22:  scope 1 (inlined <Av1BlockInter as Clone>::clone) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           23:  let mut _4: InterIntraType; 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           24:  scope 2 (inlined <Av1BlockInterNd as Clone>::clone) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           25:  scope 3 (inlined <Av1BlockInter1d as Clone>::clone) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           26:  scope 4 (inlined array::<impl Clone for [mv; 2]>::clone) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           27:  scope 5 (inlined <mv as array::SpecArrayClone>::clone::<2>) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           28:  scope 6 (inlined #[track_caller] std::ptr::read::<[mv; 2]>) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           29:  scope 7 (inlined core::ub_checks::check_language_ub) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           30:  scope 8 (inlined core::ub_checks::check_language_ub::runtime) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           31:  } 
check:17'0     ~~~
           32:  } 
check:17'0     ~~~
           33:  scope 9 (inlined std::mem::align_of::<[mv; 2]>) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           34:  } 
check:17'0     ~~~
           35:  } 
check:17'0     ~~~
           36:  } 
check:17'0     ~~~
           37:  } 
check:17'0     ~~~
           38:  scope 10 (inlined <MaskedInterIntraPredMode as Clone>::clone) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           39:  scope 11 { 
check:17'0     ~~~~~~~~~~~~
           40:  } 
check:17'0     ~~~
           41:  } 
check:17'0     ~~~
           42:  } 
check:17'0     ~~~
           43:  } 
check:17'0     ~~~
           44:  scope 12 (inlined <Option<CompInterType> as Clone>::clone) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           45:  let mut _2: isize; 
check:17'0     ~~~~~~~~~~~~~~~~~~~~
           46:  scope 13 { 
check:17'0     ~~~~~~~~~~~~
           47:  scope 14 (inlined <CompInterType as Clone>::clone) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           48:  } 
check:17'0     ~~~
           49:  } 
check:17'0     ~~~
           50:  } 
check:17'0     ~~~
           51:  scope 15 (inlined <MotionMode as Clone>::clone) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           52:  } 
check:17'0     ~~~
           53:  scope 16 (inlined <DrlProximity as Clone>::clone) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           54:  } 
check:17'0     ~~~
           55:  scope 17 (inlined <TxfmSize as Clone>::clone) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           56:  } 
check:17'0     ~~~
           57:  scope 18 (inlined <Filter2d as Clone>::clone) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           58:  } 
check:17'0     ~~~
           59:  scope 19 (inlined <Option<InterIntraType> as Clone>::clone) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           60:  let mut _3: isize; 
check:17'0     ~~~~~~~~~~~~~~~~~~~~
           61:  scope 20 { 
check:17'0     ~~~~~~~~~~~~
           62:  scope 21 (inlined <InterIntraType as Clone>::clone) { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           63:  } 
check:17'0     ~~~
           64:  } 
check:17'0     ~~~
           65:  } 
check:17'0     ~~~
           66:  } 
check:17'0     ~~~
           67:  
check:17'0     ~
           68:  bb0: { 
check:17'0     ~~~~~~~~
           69:  (((_0 as variant#1).0: Av1BlockInter).0: Av1BlockInterNd) = copy ((*_1).0: Av1BlockInterNd); 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           70:  StorageLive(_2); 
check:17'0     ~~~~~~~~~~~~~~~~~~
           71:  _2 = discriminant(((*_1).1: std::option::Option<CompInterType>)); 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           72:  switchInt(move _2) -> [0: bb1, 1: bb2, otherwise: bb7]; 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           73:  } 
check:17'0     ~~~
           74:  
check:17'0     ~
           75:  bb1: { 
check:17'0     ~~~~~~~~
           76:  StorageDead(_2); 
check:17'0     ~~~~~~~~~~~~~~~~~~
           77:  (((_0 as variant#1).0: Av1BlockInter).1: std::option::Option<CompInterType>) = const Option::<CompInterType>::None; 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           78:  goto -> bb3; 
check:17'0     ~~~~~~~~~~~~~~
           79:  } 
check:17'0     ~~~
           80:  
check:17'0     ~
           81:  bb2: { 
check:17'0     ~~~~~~~~
           82:  StorageDead(_2); 
check:17'0     ~~~~~~~~~~~~~~~~~~
           83:  (((((_0 as variant#1).0: Av1BlockInter).1: std::option::Option<CompInterType>) as variant#1).0: CompInterType) = copy ((((*_1).1: std::option::Option<CompInterType>) as Some).0: CompInterType); 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:17'1                                                                                                               ?                                                                                         possible intended match
           84:  discriminant((((_0 as variant#1).0: Av1BlockInter).1: std::option::Option<CompInterType>)) = 1; 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           85:  goto -> bb3; 
check:17'0     ~~~~~~~~~~~~~~
           86:  } 
check:17'0     ~~~
           87:  
check:17'0     ~
           88:  bb3: { 
check:17'0     ~~~~~~~~
           89:  (((_0 as variant#1).0: Av1BlockInter).2: u8) = copy ((*_1).2: u8); 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           90:  (((_0 as variant#1).0: Av1BlockInter).3: MotionMode) = copy ((*_1).3: MotionMode); 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           91:  (((_0 as variant#1).0: Av1BlockInter).4: DrlProximity) = copy ((*_1).4: DrlProximity); 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           92:  (((_0 as variant#1).0: Av1BlockInter).5: [i8; 2]) = copy ((*_1).5: [i8; 2]); 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           93:  (((_0 as variant#1).0: Av1BlockInter).6: TxfmSize) = copy ((*_1).6: TxfmSize); 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           94:  (((_0 as variant#1).0: Av1BlockInter).7: Filter2d) = copy ((*_1).7: Filter2d); 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           95:  StorageLive(_3); 
check:17'0     ~~~~~~~~~~~~~~~~~~
           96:  _3 = discriminant(((*_1).8: std::option::Option<InterIntraType>)); 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           97:  switchInt(move _3) -> [0: bb4, 1: bb5, otherwise: bb7]; 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           98:  } 
check:17'0     ~~~
           99:  
check:17'0     ~
          100:  bb4: { 
check:17'0     ~~~~~~~~
          101:  StorageDead(_3); 
check:17'0     ~~~~~~~~~~~~~~~~~~
          102:  (((_0 as variant#1).0: Av1BlockInter).8: std::option::Option<InterIntraType>) = const Option::<InterIntraType>::None; 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          103:  goto -> bb6; 
check:17'0     ~~~~~~~~~~~~~~
          104:  } 
check:17'0     ~~~
          105:  
check:17'0     ~
          106:  bb5: { 
check:17'0     ~~~~~~~~
          107:  StorageDead(_3); 
check:17'0     ~~~~~~~~~~~~~~~~~~
          108:  StorageLive(_4); 
check:17'0     ~~~~~~~~~~~~~~~~~~
          109:  _4 = copy ((((*_1).8: std::option::Option<InterIntraType>) as Some).0: InterIntraType); 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          110:  (((((_0 as variant#1).0: Av1BlockInter).8: std::option::Option<InterIntraType>) as variant#1).0: InterIntraType) = move _4; 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          111:  StorageDead(_4); 
check:17'0     ~~~~~~~~~~~~~~~~~~
          112:  discriminant((((_0 as variant#1).0: Av1BlockInter).8: std::option::Option<InterIntraType>)) = 1; 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          113:  goto -> bb6; 
check:17'0     ~~~~~~~~~~~~~~
          114:  } 
check:17'0     ~~~
          115:  
check:17'0     ~
          116:  bb6: { 
check:17'0     ~~~~~~~~
          117:  (((_0 as variant#1).0: Av1BlockInter).9: u8) = copy ((*_1).9: u8); 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          118:  (((_0 as variant#1).0: Av1BlockInter).10: u16) = copy ((*_1).10: u16); 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          119:  discriminant(_0) = 1; 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~
          120:  return; 
check:17'0     ~~~~~~~~~
          121:  } 
check:17'0     ~~~
          122:  
check:17'0     ~
          123:  bb7: { 
check:17'0     ~~~~~~~~
          124:  StorageDead(_2); 
---
check:17'0     ~~~
          128: } 
check:17'0     ~~
          129:  
check:17'0     ~
          130: fn dav1dsequenceheader_copy(_1: &Dav1dSequenceHeader) -> Dav1dSequenceHeader { 
check:17'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          131:  debug v => _1; 
          132:  let mut _0: Dav1dSequenceHeader; 
          133:  scope 1 (inlined <Dav1dSequenceHeader as Clone>::clone) { 
          134:  scope 2 (inlined array::<impl Clone for [Dav1dSequenceHeaderOperatingPoint; 32]>::clone) { 
          135:  scope 3 (inlined <Dav1dSequenceHeaderOperatingPoint as array::SpecArrayClone>::clone::<32>) { 
          136:  scope 4 (inlined #[track_caller] std::ptr::read::<[Dav1dSequenceHeaderOperatingPoint; 32]>) { 
          137:  scope 5 (inlined core::ub_checks::check_language_ub) { 
          138:  scope 6 (inlined core::ub_checks::check_language_ub::runtime) { 
          139:  } 
          140:  } 
          141:  scope 7 (inlined std::mem::align_of::<[Dav1dSequenceHeaderOperatingPoint; 32]>) { 
          142:  } 
          143:  } 
          144:  } 
          145:  } 
          146:  scope 8 (inlined array::<impl Clone for [Dav1dSequenceHeaderOperatingParameterInfo; 32]>::clone) { 
          147:  scope 9 (inlined <Dav1dSequenceHeaderOperatingParameterInfo as array::SpecArrayClone>::clone::<32>) { 
          148:  scope 10 (inlined #[track_caller] std::ptr::read::<[Dav1dSequenceHeaderOperatingParameterInfo; 32]>) { 
          149:  scope 11 (inlined core::ub_checks::check_language_ub) { 
          150:  scope 12 (inlined core::ub_checks::check_language_ub::runtime) { 
          151:  } 
          152:  } 
          153:  scope 13 (inlined std::mem::align_of::<[Dav1dSequenceHeaderOperatingParameterInfo; 32]>) { 
          154:  } 
          155:  } 
          156:  } 
          157:  } 
          158:  } 
          159:  
          160:  bb0: { 
          161:  _0 = copy (*_1); 
          162:  return; 
          163:  } 
          164: } 
          165:  
          166: fn <impl at /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:29:10: 29:15>::clone(_1: &mv) -> mv { 
          167:  debug self => _1; 
          168:  let mut _0: mv; 
          169:  scope 1 { 
          170:  } 
          171:  
          172:  bb0: { 
          173:  _0 = copy (*_1); 
          174:  return; 
          175:  } 
          176: } 
          177:  
          178: fn <impl at /checkout/tests/mir-opt/pre-codegen/copy_and_clone.rs:36:10: 36:15>::clone(_1: &MaskedInterIntraPredMode) -> MaskedInterIntraPredMode { 
          179:  debug self => _1; 
          180:  let mut _0: MaskedInterIntraPredMode; 
          181:  scope 1 { 
          182:  } 
          183:  
            .
            .
            .
>>>>>>
---
8     }
9 
10     bb0: {
+         StorageLive(_2);
11         _2 = discriminant(_1);
12         switchInt(move _2) -> [1: bb1, 2: bb1, otherwise: bb2];
13     }

14 
15     bb1: {
+         StorageDead(_2);
---
22         return;
23     }


thread '[mir-opt] tests/mir-opt/pre-codegen/matches_macro.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/matches_macro.issue_77355_opt.PreCodegen.after.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/pre-codegen/matches_macro.rs stdout end ----
---- [mir-opt] tests/mir-opt/pre-codegen/range_iter.rs stdout ----
3 fn range_iter_next(_1: &mut std::ops::Range<u32>) -> Option<u32> {
4     debug it => _1;
5     let mut _0: std::option::Option<u32>;
+     let mut _5: u32;
6     scope 1 (inlined iter::range::<impl Iterator for std::ops::Range<u32>>::next) {
7         scope 2 (inlined <std::ops::Range<u32> as iter::range::RangeIteratorImpl>::spec_next) {
8             let mut _4: bool;

-             let _5: u32;
10             let mut _6: u32;
11             scope 3 {
12                 scope 5 (inlined <u32 as Step>::forward_unchecked) {

26     }
27 
28     bb0: {
-         StorageLive(_4);
30         StorageLive(_2);
31         _2 = copy ((*_1).0: u32);
32         StorageLive(_3);

33         _3 = copy ((*_1).1: u32);
+         StorageLive(_4);
34         _4 = Lt(move _2, move _3);
-         StorageDead(_3);
36         StorageDead(_2);
+         StorageDead(_3);
37         switchInt(move _4) -> [0: bb1, otherwise: bb2];
38     }
39 

40     bb1: {
+         StorageDead(_4);
41         _0 = const Option::<u32>::None;
42         goto -> bb3;
43     }

44 
45     bb2: {
+         StorageDead(_4);
+         ((_0 as variant#1).0: u32) = copy ((*_1).0: u32);
46         StorageLive(_5);
-         _5 = copy ((*_1).0: u32);
+         _5 = copy ((_0 as variant#1).0: u32);
48         StorageLive(_6);
49         _6 = AddUnchecked(copy _5, const 1_u32);
+         StorageDead(_5);
50         ((*_1).0: u32) = move _6;
51         StorageDead(_6);
-         _0 = Option::<u32>::Some(copy _5);
-         StorageDead(_5);
+         discriminant(_0) = 1;
54         goto -> bb3;
---
60     }
61 }


thread '[mir-opt] tests/mir-opt/pre-codegen/range_iter.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/range_iter.range_iter_next.PreCodegen.after.panic-unwind.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/pre-codegen/range_iter.rs stdout end ----
---- [mir-opt] tests/mir-opt/pre-codegen/simple_option_map.rs stdout ----
5     let mut _0: std::option::Option<i32>;
6     scope 1 (inlined map::<i32, i32, {closure@$DIR/simple_option_map.rs:23:12: 23:15}>) {
7         let mut _2: isize;
-         let _3: i32;
-         let mut _4: i32;
10         scope 2 {
11             scope 3 (inlined ezmap::{closure#0}) {
12             }

20     }
21 
22     bb1: {
---

26 
27     bb2: {
-         StorageLive(_3);
-         _3 = copy ((_1 as Some).0: i32);
-         StorageLive(_4);
-         _4 = Add(copy _3, const 1_i32);
-         _0 = Option::<i32>::Some(move _4);
-         StorageDead(_4);
-         StorageDead(_3);
+         StorageDead(_2);
+         ((_0 as variant#1).0: i32) = Add(copy ((_1 as Some).0: i32), const 1_i32);
+         discriminant(_0) = 1;
35         goto -> bb3;
36     }
37 

38     bb3: {
-         StorageDead(_2);
---
45     }
46 }


thread '[mir-opt] tests/mir-opt/pre-codegen/simple_option_map.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/simple_option_map.ezmap.PreCodegen.after.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
10     bb0: {
+         StorageLive(_3);
11         _3 = PtrMetadata(copy _1);
+         StorageLive(_4);
12         _4 = Lt(copy _2, copy _3);
13         assert(move _4, "index out of bounds: the length is {} but the index is {}", move _3, copy _2) -> [success: bb1, unwind continue];
14     }

15 
16     bb1: {
+         StorageDead(_3);
+         StorageDead(_4);
17         _0 = copy (*_1)[_2];
18         return;
19     }


thread '[mir-opt] tests/mir-opt/pre-codegen/slice_index.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/slice_index.slice_index_usize.PreCodegen.after.panic-unwind.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
67     }
68 
69     bb0: {
+         StorageLive(_3);
70         _3 = no_retag copy (*_2);
+         StorageLive(_4);
71         // DBG: _16 = &((*_3).0: usize);
72         _4 = no_retag copy (*_2);
+         StorageLive(_5);
73         // DBG: _17 = &((*_4).1: usize);
74         _5 = no_retag copy (*_2);
+         StorageLive(_6);
75         // DBG: _18 = &((*_5).2: usize);
76         _6 = no_retag copy (*_2);
77         // DBG: _19 = &((*_6).3: usize);

-         StorageLive(_9);
+         StorageLive(_7);
79         // DBG: _20 = &_16;
80         // DBG: _21 = &?;
81         _7 = copy ((*_3).0: usize);

+         StorageDead(_3);
+         StorageLive(_8);
82         _8 = copy ((*_5).2: usize);
+         StorageLive(_9);
+         StorageDead(_5);
83         _9 = Le(copy _7, copy _8);
84         switchInt(move _9) -> [0: bb2, otherwise: bb1];
85     }

86 
87     bb1: {
-         StorageLive(_12);
+         StorageDead(_9);
89         // DBG: _22 = &_19;
90         // DBG: _23 = &?;
91         StorageLive(_10);

92         _10 = copy ((*_6).3: usize);
93         StorageLive(_11);
94         _11 = copy ((*_4).1: usize);
+         StorageLive(_12);
95         _12 = Le(move _10, move _11);
-         StorageDead(_11);
97         StorageDead(_10);
+         StorageDead(_11);
98         switchInt(move _12) -> [0: bb2, otherwise: bb6];
99     }
100 

101     bb2: {
+         StorageDead(_9);
+         StorageDead(_12);
102         StorageLive(_13);
103         // DBG: _24 = &_18;
104         // DBG: _25 = &?;

105         _13 = Le(copy _8, copy _7);
+         StorageDead(_7);
+         StorageDead(_8);
106         switchInt(move _13) -> [0: bb3, otherwise: bb4];
107     }
108 

109     bb3: {
+         StorageDead(_13);
---

113 
114     bb4: {
+         StorageDead(_13);
115         // DBG: _26 = &_17;
116         // DBG: _27 = &?;
117         StorageLive(_14);

118         _14 = copy ((*_4).1: usize);
+         StorageDead(_4);
119         StorageLive(_15);
120         _15 = copy ((*_6).3: usize);
+         StorageDead(_6);
121         _0 = Le(move _14, move _15);
-         StorageDead(_15);
123         StorageDead(_14);
+         StorageDead(_15);
124         goto -> bb5;
125     }
---
141     }
142 }


thread '[mir-opt] tests/mir-opt/pre-codegen/slice_filter.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/slice_filter.variant_a-{closure#0}.PreCodegen.after.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/pre-codegen/slice_filter.rs stdout end ----
---- [mir-opt] tests/mir-opt/pre-codegen/transmutes.rs stdout ----
5     let mut _0: [u32; 2];
6     scope 1 (inlined transmute_prefix::<[u32; 4], [u32; 2]>) {
7         let _2: std::mem::transmute_prefix::Transmute<[u32; 4], [u32; 2]>;
-         let mut _3: std::mem::ManuallyDrop<[u32; 2]>;
9         scope 2 {
10         }
11         scope 3 {

19     bb0: {
20         StorageLive(_2);
21         _2 = copy _1 as std::mem::transmute_prefix::Transmute<[u32; 4], [u32; 2]> (Transmute);
-         StorageLive(_3);
-         _3 = move (_2.1: std::mem::ManuallyDrop<[u32; 2]>);
-         _0 = copy _3 as [u32; 2] (Transmute);
-         StorageDead(_3);
+         _0 = copy (_2.1: std::mem::ManuallyDrop<[u32; 2]>) as [u32; 2] (Transmute);
26         StorageDead(_2);
27         return;
28     }


thread '[mir-opt] tests/mir-opt/pre-codegen/transmutes.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/transmutes.prefix_of_array.PreCodegen.after.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/pre-codegen/transmutes.rs stdout end ----
---- [mir-opt] tests/mir-opt/pre-codegen/try_identity.rs stdout ----
4     debug x => _1;
5     let mut _0: std::result::Result<T, E>;
6     let mut _2: isize;
-     let _3: T;
-     let mut _4: std::ops::ControlFlow<E, T>;
-     let _5: T;
-     let _6: E;
-     let _7: E;
+     let mut _3: std::ops::ControlFlow<E, T>;
12     scope 1 {
-         debug v => _3;
+         debug v => ((_1 as Ok).0: T);
14     }
15     scope 2 {
-         debug e => _6;
+         debug e => ((_1 as Err).0: E);
17     }
18     scope 3 {
-         debug v => _5;
+         debug v => ((_3 as Continue).0: T);
20     }
21     scope 4 {
-         debug e => _7;
+         debug e => ((_3 as Break).0: E);
23     }
24 
25     bb0: {

-         StorageLive(_4);
+         StorageLive(_2);
27         _2 = discriminant(_1);
28         switchInt(move _2) -> [0: bb1, 1: bb2, otherwise: bb4];
29     }

30 
31     bb1: {
+         StorageDead(_2);
32         StorageLive(_3);
-         _3 = move ((_1 as Ok).0: T);
-         _4 = ControlFlow::<E, T>::Continue(copy _3);
+         _3 = ControlFlow::<E, T>::Continue(copy ((_1 as Ok).0: T));
+         _0 = Result::<T, E>::Ok(copy ((_3 as Continue).0: T));
35         StorageDead(_3);
-         _5 = move ((_4 as Continue).0: T);
-         _0 = Result::<T, E>::Ok(copy _5);
-         StorageDead(_4);
39         goto -> bb3;
40     }
41 

42     bb2: {
-         StorageLive(_6);
-         _6 = move ((_1 as Err).0: E);
-         _4 = ControlFlow::<E, T>::Break(copy _6);
-         StorageDead(_6);
-         StorageLive(_7);
-         _7 = move ((_4 as Break).0: E);
-         _0 = Result::<T, E>::Err(copy _7);
-         StorageDead(_7);
-         StorageDead(_4);
+         StorageDead(_2);
+         StorageLive(_3);
+         _3 = ControlFlow::<E, T>::Break(copy ((_1 as Err).0: E));
+         _0 = Result::<T, E>::Err(copy ((_3 as Break).0: E));
+         StorageDead(_3);
52         goto -> bb3;
53     }
54 

---
61     }
62 }


thread '[mir-opt] tests/mir-opt/pre-codegen/try_identity.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/try_identity.new.PreCodegen.after.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
---- [mir-opt] tests/mir-opt/pre-codegen/two_unwrap_unchecked.rs stdout ----
60       }
61   
62       bb3: {
- -         _2 = move ((_3 as Some).0: i32);
64 -         StorageDead(_8);
+ -         _2 = move ((_3 as Some).0: i32);
65 -         StorageDead(_3);
+ +         nop;
66 +         _2 = copy ((_3 as Some).0: i32);
67 +         nop;
- +         nop;
69           StorageLive(_4);
70           StorageLive(_5);
71 -         _5 = copy (*_1);

82       }
83   
84       bb5: {
+           StorageDead(_9);
85 -         _4 = move ((_5 as Some).0: i32);
86 +         _4 = copy _2;
-           StorageDead(_9);
88           StorageDead(_5);
89           StorageLive(_6);
90           _6 = copy _2;


thread '[mir-opt] tests/mir-opt/pre-codegen/two_unwrap_unchecked.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/two_unwrap_unchecked.two_unwrap_unchecked.GVN.diff
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
  10: <compiletest::runtest::TestCx>::run_revision
  11: compiletest::runtest::run
note: Some details are omitted, run with `RUST_BACKTRACE=full` for a verbose backtrace.
---- [mir-opt] tests/mir-opt/pre-codegen/two_unwrap_unchecked.rs stdout end ----
---- [mir-opt] tests/mir-opt/pre-codegen/tuple_ord.rs stdout ----
6     let mut _0: bool;
7     scope 1 (inlined std::cmp::impls::<impl PartialOrd for &(u16, i16)>::le) {
8         scope 2 (inlined core::tuple::<impl PartialOrd for (u16, i16)>::le) {
-             let mut _7: std::ops::ControlFlow<bool>;
+             let mut _6: std::ops::ControlFlow<bool>;
10             scope 3 {
11             }
12             scope 4 (inlined std::cmp::impls::<impl PartialOrd for u16>::__chaining_le) {

13                 let mut _3: u16;
14                 let mut _4: u16;
15                 let mut _5: bool;
-                 let mut _6: bool;
17                 scope 5 {
18                 }
19             }

20             scope 6 (inlined std::cmp::impls::<impl PartialOrd for i16>::le) {
+                 let mut _7: i16;
21                 let mut _8: i16;
-                 let mut _9: i16;
23             }
24         }
25     }

26 
---
31         _3 = copy ((*_1).0: u16);
+         StorageLive(_4);
32         _4 = copy ((*_2).0: u16);
33         StorageLive(_5);
34         _5 = Eq(copy _3, copy _4);

36     }
37 
38     bb1: {
-         StorageLive(_6);
-         _6 = Le(copy _3, copy _4);
-         _7 = ControlFlow::<bool>::Break(move _6);
-         StorageDead(_6);
43         StorageDead(_5);
-         StorageDead(_4);
+         StorageLive(_6);
+         ((_6 as variant#1).0: bool) = Le(copy _3, copy _4);
45         StorageDead(_3);
-         _0 = copy ((_7 as Break).0: bool);
+         StorageDead(_4);
+         discriminant(_6) = 1;
+         _0 = copy ((_6 as Break).0: bool);
+         StorageDead(_6);
47         goto -> bb3;
48     }
49 

---
+         _7 = copy ((*_1).1: i16);
54         StorageLive(_8);
-         _8 = copy ((*_1).1: i16);
-         StorageLive(_9);
-         _9 = copy ((*_2).1: i16);
-         _0 = Le(move _8, move _9);
-         StorageDead(_9);
+         _8 = copy ((*_2).1: i16);
+         _0 = Le(move _7, move _8);
+         StorageDead(_7);
60         StorageDead(_8);
61         goto -> bb3;
62     }

---
67     }
68 }


thread '[mir-opt] tests/mir-opt/pre-codegen/tuple_ord.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/tuple_ord.demo_le_total.PreCodegen.after.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
36     bb0: {
-         StorageLive(_5);
-         StorageLive(_3);
39         StorageLive(_2);
40         _2 = copy (((((*_1).0: alloc::raw_vec::RawVec<u8>).0: alloc::raw_vec::RawVecInner).0: std::ptr::Unique<u8>).0: std::ptr::NonNull<u8>);
+         StorageLive(_3);
41         _3 = copy _2 as *const u8 (Transmute);
42         StorageDead(_2);
43         StorageLive(_4);

44         _4 = copy ((*_1).1: usize);
+         StorageLive(_5);
45         _5 = *const [u8] from (copy _3, move _4);
-         StorageDead(_4);
47         StorageDead(_3);
+         StorageDead(_4);
48         _0 = &(*_5);
49         StorageDead(_5);
50         return;


thread '[mir-opt] tests/mir-opt/pre-codegen/vec_deref.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/pre-codegen/vec_deref.vec_deref_to_slice.PreCodegen.after.panic-unwind.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
11       scope 1 {
12           debug residual => _4;
13           scope 2 {

14               scope 8 (inlined #[track_caller] <Result<i32, i32> as FromResidual<Result<Infallible, i32>>>::from_residual) {
-                   let mut _10: isize;
-                   let _11: i32;
-                   let mut _12: bool;
+                   let mut _7: isize;
+                   let mut _8: bool;
18                   scope 9 {
19                       scope 10 (inlined <i32 as From<i32>>::from) {
20                       }

29       }
30       scope 5 (inlined <Result<i32, i32> as Try>::branch) {
31           let mut _6: isize;
-           let _7: i32;
-           let _8: i32;
-           let mut _9: std::result::Result<std::convert::Infallible, i32>;
35           scope 6 {
36           }
37           scope 7 {

59       bb3: {
60           StorageLive(_4);
61           _4 = copy ((_2 as Break).0: std::result::Result<std::convert::Infallible, i32>);
-           StorageLive(_10);
-           StorageLive(_12);
-           _10 = discriminant(_4);
-           _12 = Eq(copy _10, const 1_isize);
-           assume(move _12);
-           StorageLive(_11);
-           _11 = copy ((_4 as Err).0: i32);
-           _0 = Result::<i32, i32>::Err(copy _11);
-           StorageDead(_11);
-           StorageDead(_12);
-           StorageDead(_10);
+           StorageLive(_7);
+           _7 = discriminant(_4);
+           StorageLive(_8);
+           _8 = Eq(copy _7, const 1_isize);
+           StorageDead(_7);
+           assume(move _8);
+           StorageDead(_8);
+           StorageLive(_9);
+           _9 = copy ((_4 as Err).0: i32);
+           ((_0 as variant#1).0: i32) = copy _9;
+           StorageDead(_9);
+           discriminant(_0) = 1;
73           StorageDead(_4);
74           StorageDead(_2);
75           return;

76       }
77   
78       bb4: {
-           StorageDead(_6);
80           _3 = discriminant(_2);
81           switchInt(move _3) -> [0: bb2, 1: bb3, otherwise: bb1];
82       }

83   
84       bb5: {
-           StorageLive(_8);
-           _8 = copy ((_1 as Err).0: i32);
-           StorageLive(_9);
-           _9 = Result::<Infallible, i32>::Err(copy _8);
-           _2 = ControlFlow::<Result<Infallible, i32>, i32>::Break(move _9);
-           StorageDead(_9);
-           StorageDead(_8);
+           StorageDead(_6);
+           ((_2 as variant#1).0: std::result::Result<std::convert::Infallible, i32>) = Result::<Infallible, i32>::Err(copy ((_1 as Err).0: i32));
+           discriminant(_2) = 1;
92 -         goto -> bb4;
93 +         goto -> bb7;
94       }

95   
96       bb6: {
-           StorageLive(_7);
-           _7 = copy ((_1 as Ok).0: i32);
-           _2 = ControlFlow::<Result<Infallible, i32>, i32>::Continue(copy _7);
-           StorageDead(_7);
+           StorageDead(_6);
+           _2 = ControlFlow::<Result<Infallible, i32>, i32>::Continue(copy ((_1 as Ok).0: i32));
101 -         goto -> bb4;
102 +         goto -> bb8;
103 +     }

104 + 
105 +     bb7: {
- +         StorageDead(_6);
107 +         _3 = discriminant(_2);
108 +         goto -> bb3;
109 +     }

110 + 
111 +     bb8: {
- +         StorageDead(_6);
113 +         _3 = discriminant(_2);
114 +         goto -> bb2;
115       }


thread '[mir-opt] tests/mir-opt/separate_const_switch.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/separate_const_switch.identity.JumpThreading.diff
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14
---
-         StorageLive(_2);
32         StorageLive(_3);
33         _3 = &raw const _1;
+         StorageLive(_2);
34         _2 = copy _3 as *const ! (PtrToPtr);
-         StorageDead(_3);
36         StorageDead(_2);
+         StorageDead(_3);
37         StorageDead(_1);
38         StorageLive(_4);
39         _4 = const 3_u8;

-         StorageLive(_5);
41         StorageLive(_6);
42         _6 = &raw const _4;
+         StorageLive(_5);
43         _5 = copy _6 as *const ! (PtrToPtr);
-         StorageDead(_6);
45         StorageDead(_5);
+         StorageDead(_6);
46         StorageDead(_4);
47         return;
48     }


thread '[mir-opt] tests/mir-opt/uninhabited_not_read.rs' panicked at src/tools/compiletest/src/runtest/mir_opt.rs:73:21:
Actual MIR output differs from expected MIR output /checkout/tests/mir-opt/uninhabited_not_read.main.SimplifyLocals-final.after.mir
stack backtrace:
   8: __rustc::rust_begin_unwind
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/std/src/panicking.rs:689:5
   9: core::panicking::panic_fmt
             at /rustc/ef0fb8a2563200e322fa4419f09f65a63742038c/library/core/src/panicking.rs:80:14

[rust-bors]

☀️ Try build successful (CI)
Build commit: bc25cfa (bc25cfa7e76a09aca94729dec92a782544a9cec4, parent: cb40c25f6aebb637163d26bf76a680ed6e5d1eda)

[rust-timer]

Finished benchmarking commit (bc25cfa): comparison URL.

Overall result: ❌✅ regressions and improvements - please read:

Benchmarking means the PR may be perf-sensitive. It's automatically marked not fit for rolling up. Overriding is possible but disadvised: it risks changing compiler perf.

Next, please: If you can, justify the regressions found in this try perf run in writing along with @rustbot label: +perf-regression-triaged. If not, fix the regressions and do another perf run. Neutral or positive results will clear the label automatically.

@bors rollup=never
@rustbot label: -S-waiting-on-perf +perf-regression

Instruction count

Our most reliable metric. Used to determine the overall result above. However, even this metric can be noisy.

	mean	range	count
Regressions ❌ (primary)	7.5%	[0.1%, 99.2%]	74
Regressions ❌ (secondary)	120.8%	[0.0%, 4875.6%]	87
Improvements ✅ (primary)	-1.0%	[-7.0%, -0.2%]	143
Improvements ✅ (secondary)	-1.1%	[-10.6%, -0.0%]	152
All ❌✅ (primary)	1.9%	[-7.0%, 99.2%]	217

Max RSS (memory usage)

Results (primary 6.8%, secondary 25.1%)

A less reliable metric. May be of interest, but not used to determine the overall result above.

	mean	range	count
Regressions ❌ (primary)	7.8%	[1.5%, 30.9%]	37
Regressions ❌ (secondary)	33.4%	[1.6%, 175.8%]	13
Improvements ✅ (primary)	-2.5%	[-3.7%, -1.4%]	4
Improvements ✅ (secondary)	-2.0%	[-2.7%, -0.8%]	4
All ❌✅ (primary)	6.8%	[-3.7%, 30.9%]	41

Cycles

Results (primary 24.4%, secondary 1817.2%)

A less reliable metric. May be of interest, but not used to determine the overall result above.

	mean	range	count
Regressions ❌ (primary)	59.4%	[1.6%, 642.5%]	26
Regressions ❌ (secondary)	6962.3%	[0.9%, 61558.9%]	17
Improvements ✅ (primary)	-3.2%	[-6.1%, -1.9%]	33
Improvements ✅ (secondary)	-5.1%	[-22.6%, -1.0%]	48
All ❌✅ (primary)	24.4%	[-6.1%, 642.5%]	59

Binary size

Results (primary 4.8%, secondary 2.8%)

A less reliable metric. May be of interest, but not used to determine the overall result above.

	mean	range	count
Regressions ❌ (primary)	5.9%	[0.1%, 95.1%]	109
Regressions ❌ (secondary)	3.3%	[0.1%, 71.4%]	135
Improvements ✅ (primary)	-0.9%	[-2.7%, -0.2%]	22
Improvements ✅ (secondary)	-1.0%	[-4.9%, -0.2%]	20
All ❌✅ (primary)	4.8%	[-2.7%, 95.1%]	131

Bootstrap: 497.794s -> 533.437s (7.16%)
Artifact size: 396.40 MiB -> 393.34 MiB (-0.77%)