@@ -199,7 +199,7 @@ pub unsafe fn _mm512_mask_cmpeq_epu64_mask(m: __mmask8, a: __m512i, b: __m512i)
199
199
_mm512_cmpeq_epu64_mask ( a, b) & m
200
200
}
201
201
202
- /// Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector.
202
+ /// Compare packed signed 64-bit integers in a and b for less-than, and store the results in a mask vector.
203
203
///
204
204
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmplt_epi64)
205
205
#[ inline]
@@ -209,7 +209,7 @@ pub unsafe fn _mm512_cmplt_epi64_mask(a: __m512i, b: __m512i) -> __mmask8 {
209
209
simd_bitmask :: < __m512i , _ > ( simd_lt ( a. as_i64x8 ( ) , b. as_i64x8 ( ) ) )
210
210
}
211
211
212
- ///Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector k
212
+ ///Compare packed signed 64-bit integers in a and b for less-than, and store the results in a mask vector k
213
213
/// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
214
214
///
215
215
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmplt_epi64)
@@ -220,7 +220,7 @@ pub unsafe fn _mm512_mask_cmplt_epi64_mask(m: __mmask8, a: __m512i, b: __m512i)
220
220
_mm512_cmplt_epi64_mask ( a, b) & m
221
221
}
222
222
223
- /// Compare packed unsigned 64-bit integers in a and b for greater-than, and store the results in a mask vector.
223
+ /// Compare packed signed 64-bit integers in a and b for greater-than, and store the results in a mask vector.
224
224
///
225
225
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmpgt_epi64)
226
226
#[ inline]
@@ -230,7 +230,7 @@ pub unsafe fn _mm512_cmpgt_epi64_mask(a: __m512i, b: __m512i) -> __mmask8 {
230
230
simd_bitmask :: < __m512i , _ > ( simd_gt ( a. as_i64x8 ( ) , b. as_i64x8 ( ) ) )
231
231
}
232
232
233
- ///Compare packed unsigned 64-bit integers in a and b for greater-than, and store the results in a mask vector k
233
+ ///Compare packed signed 64-bit integers in a and b for greater-than, and store the results in a mask vector k
234
234
/// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
235
235
///
236
236
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmpgt_epi64)
@@ -241,7 +241,7 @@ pub unsafe fn _mm512_mask_cmpgt_epi64_mask(m: __mmask8, a: __m512i, b: __m512i)
241
241
_mm512_cmpgt_epi64_mask ( a, b) & m
242
242
}
243
243
244
- /// Compare packed unsigned 64-bit integers in a and b for less-than-or-equal, and store the results in a mask vector.
244
+ /// Compare packed signed 64-bit integers in a and b for less-than-or-equal, and store the results in a mask vector.
245
245
///
246
246
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmple_epi64)
247
247
#[ inline]
@@ -251,7 +251,7 @@ pub unsafe fn _mm512_cmple_epi64_mask(a: __m512i, b: __m512i) -> __mmask8 {
251
251
_mm512_cmpgt_epi64_mask ( b, a)
252
252
}
253
253
254
- ///Compare packed unsigned 64-bit integers in a and b for less-than-or-equal, and store the results in a mask vector k
254
+ ///Compare packed signed 64-bit integers in a and b for less-than-or-equal, and store the results in a mask vector k
255
255
/// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
256
256
///
257
257
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmple_epi64)
@@ -262,7 +262,7 @@ pub unsafe fn _mm512_mask_cmple_epi64_mask(m: __mmask8, a: __m512i, b: __m512i)
262
262
_mm512_cmpgt_epi64_mask ( b, a) & m
263
263
}
264
264
265
- /// Compare packed unsigned 64-bit integers in a and b for greater-than-or-equal, and store the results in a mask vector.
265
+ /// Compare packed signed 64-bit integers in a and b for greater-than-or-equal, and store the results in a mask vector.
266
266
///
267
267
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmpge_epi64)
268
268
#[ inline]
@@ -272,7 +272,7 @@ pub unsafe fn _mm512_cmpge_epi64_mask(a: __m512i, b: __m512i) -> __mmask8 {
272
272
_mm512_cmplt_epi64_mask ( b, a)
273
273
}
274
274
275
- ///Compare packed unsigned 64-bit integers in a and b for greater-than-or-equal, and store the results in a mask vector k
275
+ ///Compare packed signed 64-bit integers in a and b for greater-than-or-equal, and store the results in a mask vector k
276
276
/// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
277
277
///
278
278
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmpge_epi64)
@@ -283,7 +283,7 @@ pub unsafe fn _mm512_mask_cmpge_epi64_mask(m: __mmask8, a: __m512i, b: __m512i)
283
283
_mm512_cmplt_epi64_mask ( b, a) & m
284
284
}
285
285
286
- /// Compare packed unsigned 64-bit integers in a and b for equality, and store the results in a mask vector.
286
+ /// Compare packed signed 64-bit integers in a and b for equality, and store the results in a mask vector.
287
287
///
288
288
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmpeq_epi64)
289
289
#[ inline]
@@ -293,7 +293,7 @@ pub unsafe fn _mm512_cmpeq_epi64_mask(a: __m512i, b: __m512i) -> __mmask8 {
293
293
simd_bitmask :: < __m512i , _ > ( simd_eq ( a. as_i64x8 ( ) , b. as_i64x8 ( ) ) )
294
294
}
295
295
296
- ///Compare packed unsigned 64-bit integers in a and b for equality, and store the results in a mask vector k
296
+ ///Compare packed signed 64-bit integers in a and b for equality, and store the results in a mask vector k
297
297
/// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
298
298
///
299
299
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmpeq_epi64)
0 commit comments