Implement bitwise SSE ops & _mm_cmp*_ss #103
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alexcrichton
reviewed
Oct 8, 2017
| /// Bitwise AND of packed single-precision (32-bit) floating-point elements. | ||
| #[inline(always)] | ||
| #[target_feature = "+sse"] | ||
| // i586 only seems to generate plain `and` instructions, so ignore it. |
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This seems a little worrisome, I wonder if we don't have the right codegen for that then?
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Er well apparently this is normal!
|
Thanks! Mind rebasing now as well? |
LLVM for i586 doesn't seem to generate `andps`, and instead generates 4 `and`s. Similar for the other operations.
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👍 |
gwenn
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Oct 14, 2017
* Add _mm_{and,andnot,or,xor}_ps
* Add _mm_cmpeq_ss
* Add _mm_cmplt_ss
* Add _mm_cmple_ss
* Add _mm_cmpgt_ss
* Add _mm_cmpge_ss
* Add _mm_cmpneq_ss
* Add _mm_cmpnlt_ss
* Add _mm_cmpnle_ss
* Add _mm_cmpngt_ss
* Add _mm_cmpnge_ss
* Add _mm_cmpord_ss
* Add _mm_cmpunord_ss
* Fix _mm_{and,andnot,or,xor}_ps tests for i586
LLVM for i586 doesn't seem to generate `andps`, and instead generates 4
`and`s. Similar for the other operations.
alexcrichton
pushed a commit
that referenced
this pull request
Oct 14, 2017
* avx: _mm256_loadu_pd * avx: _mm256_storeu_pd * avx: _mm256_loadu_ps * avx: _mm256_storeu_ps * avx: fix _mm256_storeu_pd and _mm256_storeu_ps * avx: _mm256_loadu_si256 * avx: _mm256_undefined_si256 * avx: _mm256_maskload_pd * avx: _mm256_maskstore_pd * Attempt to fix CI (#108) Need to bring codegen units back to only one for now * [x86] sse4.2 add docs for _SIDD_EQUAL_RANGES (#107) - Add docs for the _SIDD_EQUAL_RANGES mode * Add _MM_TRANSPOSE4_PS pseudo-macro. (#106) This adds a strange macro, which I've replaced with a function, because it seems there are not many better alternatives. Also adds a test, and `#[allow(non_snake_case)]` to `#[simd_test]`. * Fix i586 tests * Implement bitwise SSE ops & _mm_cmp*_ss (#103) * Add _mm_{and,andnot,or,xor}_ps * Add _mm_cmpeq_ss * Add _mm_cmplt_ss * Add _mm_cmple_ss * Add _mm_cmpgt_ss * Add _mm_cmpge_ss * Add _mm_cmpneq_ss * Add _mm_cmpnlt_ss * Add _mm_cmpnle_ss * Add _mm_cmpngt_ss * Add _mm_cmpnge_ss * Add _mm_cmpord_ss * Add _mm_cmpunord_ss * Fix _mm_{and,andnot,or,xor}_ps tests for i586 LLVM for i586 doesn't seem to generate `andps`, and instead generates 4 `and`s. Similar for the other operations. * avx: _mm_maskload_pd * avx: _mm_maskstore_pd * avx: _mm256_maskload_ps * avx: _mm256_maskstore_ps * avx: _mm_maskload_ps, _mm_maskstore_ps * avx: _mm256_movehdup_ps * avx: _mm256_moveldup_ps
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Implement SSE bitwise AND, OR, AND-NOT, and XOR.
Implement all variants of
_mm_cmp*_ss.