[hnyls2002]

Brings the faster SM100 fp8_fp4_mqa_logits paths to release/v0.2.3, for a post release before the next minor.

• MX scales (MXFP4 / MXFP8), BF16 weights, compressed BF16 logits, no cleaning, no schedule metadata: these calls now run a backport of the dev SM100 contiguous kernel as sm100_bf16_mqa_logits (new impls/, layout/ and scheduler/ headers under that name, plus a host launcher). It uses a 384-token KV split with three math warpgroups, separate KV and scale-factor producers, a deeper FP4 pipeline (2 Q / 8 KV stages), and reuses resident KV stages when consecutive Q blocks cover the same splits. The paged entry and the schedule-metadata builder of the dev kernel are left out; ptx::st_global_low_bf16 is added for its epilogue.
• Other BF16-weight calls without cleaning or a schedule (e.g. per-KV-scale FP8): the existing kernel takes a 384-token split with three math warpgroups instead of 256 with two. The math warpgroups split the CTA register pool four ways (statically checked), and the 384-token split loads each KV stage in 128-token TMA pieces.
• Every other variant (FP32 weights, cleaned logits, schedule metadata, paged) is unchanged.

The logits are unchanged: both kernels compute the same products and reductions per row; only the KV tiling, warp assignment and pipelining differ. Logits from the new paths match the previous kernel bit for bit on SM100 for MXFP4, MXFP8 and FP8 inputs across several row counts and KV widths, and the repository's MQA logits tests pass, covering every case of the new path plus a sample of the others, the sparse cases and the paged cases.