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[ROCm][DSV4] Support row-strided inputs in C4 v2 compression - #38919

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AMD-yanfeiwang:perf/dsv4-c4-v2-row-stride
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AMD-yanfeiwang wants to merge 1 commit into
sgl-project:mainfrom
AMD-yanfeiwang:perf/dsv4-c4-v2-row-stride

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@AMD-yanfeiwang

@AMD-yanfeiwang AMD-yanfeiwang commented Sep 10, 2026 •

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Motivation

C4 compression currently assumes a contiguous projection input. The follow-up fusion in #38920 produces zero-copy views into a wider GEMM output, so C4 needs to accept a row stride without copying.

Modifications

  • Pass the input row stride through C4 prefill and decode parameters.
  • Use that stride for row addressing while preserving the contiguous path.
  • Validate the base pointer and row pitch required by vectorized loads.

Accuracy Tests

  • test_c4_v2.py: 37 passed on gfx950.
  • The two added cases compare contiguous and production-layout strided views for both prefill and decode, covering the 2048-wide same-dtype and 512-wide mixed-dtype paths.

Speed Tests and Profiling

No standalone performance claim. This PR only enables the zero-copy layout used by #38920.

Checklist

  • ROCm kernel tests pass.
  • Contiguous-input behavior is unchanged.

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