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Fix alternate function for LTDC pins PB0 PB1 #700
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Fix alternate function for LTDC pins PB0 PB1
Could you link (or screenshot) datasheet with these pinouts? |
are there other mistakes? |
The other LTDC pins are correct. |
What about PB0/PB1 AF9? stm32f4xx-hal/src/gpio/alt/f4.rs Line 2230 in 2f76eb9
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Looks like I need to revert this PR as incorrect. |
Do we need to correct the lines in LTDC with <9> as well? There are some other lines with <9> in LTDC alternate definitions. Without the fix, following error arises |
I don't understand why you try use AF14 there. All datasheets say LTDC require PB0/PB1 and some other pins to be set in AF9. And in AF14 for other LTDC related pins. |
Sorry, Thank you. This is my fault I did not noticed that for PB0 and PB1 needs to be set AF9 for LTDC. Please revert the merge. |
If you trying to decrease boilerplate in user code instead of Line 242 in 2f76eb9
or more complex case like yours: https://github.com/stm32-rs/stm32f4xx-hal/blob/master/src/fsmc_lcd/pins.rs#L222 |
Ok. Thank you. I'll check them. |
There is conflict between the Table 10 and Table 12 in the STM32F429 datasheet.
PB0 and PB0 have alternate function 14 according to Table 10, but they are not documented on Table 12 correctly.
PB0 -> LCD_R3
PB1 -> LCD_R6
https://www.st.com/resource/en/datasheet/stm32f429zi.pdf