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Add NUCLEO-F767ZI #300

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davidanger
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Here is my work for the NUCLEO-F767ZI board.
BUB1:
When I test the Blink Demo (Finished copy file) , STLink (USB Port) will reboot or reset by evey several seconds.
But when you replugin the Board, It looks fine.
I don't know why, and how to fix this.
#295

@fpistm fpistm added the new variant Add support of new bard label Aug 10, 2018
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fpistm commented Aug 10, 2018

Hi @davidanger
Thanks I will have a look on this when I get some time.
It seems you manually update the PeripheralPins.c
FYI, It is available here:
https://github.com/stm32duino/Arduino_Tools/tree/master/src/genpinmap/Arduino/STM32F767ZITx

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Yes, Before yesterday, I don't know that already have the PeripheralPins.c Files......
So I manually update this by checking the Specification PDF's.
T_T
I think I can check again for that file.
Thanks @fpistm

@davidanger
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Hi @fpistm
I have question about PeripheralPins.c
If one PIN has two or more function, should I uncommitted all of them or just using one?
For Exp:
PB9(D14) it has 2 I2C_SDA connection ( I2C1:AF4 and I2C4:AF1 ), can I define them both, in that file?
Or I just chose one of them?

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fpistm commented Aug 13, 2018

One note the function searching in the array always return the first occurences.

In this case you have to align the I2C instance used and you do it properly to work on I2C1:
SDA

//  {PB_9,   I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C4)},
    {PB_9,   I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // D14

SCL

//  {PB_8,   I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C4)},
    {PB_8,   I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // D15

You could not use one on I2C4 and one on I2C1.

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davidanger commented Aug 16, 2018

Hi @fpistm
Ask about ADC:
F767ZI has 16 channel analog input lines for ADC IN0 to IN15, and 3 ADC converters (ADC1 to ADC3).

For Exp:
PF_3 (A3) could be setting ADC3 channel IN9
PB_1 (A6) could be setting ADC1 or ADC2 channel IN9

NUCLEO-F767ZI board define PF_3 is A3 and PB_1 is A6.

So if I using both A3 and A6 at same time, is that means PF_3 MUX to the IN9 line and PB_1 is also MUX to the IN9 line.
This 2 pin is shorted by MUX internal line (IN9)???

@davidanger davidanger changed the title Add NUCLEO-F767ZI[Not Prefact, BUGs] Add NUCLEO-F767ZI Updated STLink to Ver V2J31M21 fix random reboot Aug 17, 2018
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Thanks @fpistm
Updated firmware V2J30M20 to V2J31M21 Fixed STLink reboot bug.

I think this could be merged.

@fpistm fpistm self-requested a review August 17, 2018 04:24
@davidanger davidanger changed the title Add NUCLEO-F767ZI Updated STLink to Ver V2J31M21 fix random reboot Add NUCLEO-F767ZI [Not Merged, Need fix System clock] Aug 17, 2018
@davidanger davidanger changed the title Add NUCLEO-F767ZI [Not Merged, Need fix System clock] Add NUCLEO-F767ZI Aug 17, 2018
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Fixed System Clock from 96Mhz to 216Mhz.
Here is the STM32CubeMX report:
F767ZI.pdf

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This is not for [NUCLEO-F767ZI] I make wrong pull ....

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davidanger commented Aug 17, 2018

Sorry for the last one changes, I want to pull this changes to a new branch.
but ...
how to solve this ?

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fpistm commented Aug 17, 2018

Simply force push on the last commit you want.

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davidanger commented Aug 20, 2018

What's wrong with 43ad9c9?
Just remove PI_xx it doesn't have in STM32F767ZITx

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davidanger commented Aug 20, 2018

Yes, the STM32F767ZI is the LQFP144, so this chip don't have PI8 & PI11.
@fpistm
So, what's your suggest?
Keep it with PI8 & PI11?
If i keep it, this can work.

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fpistm commented Aug 20, 2018

yes, kept them, this is not a pb. If someone use them this will mean he got a wiring issue :)

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davidanger commented Aug 21, 2018

Thanks @fpistm
Is this finished?

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fpistm commented Sep 14, 2018

Hi @davidanger,
I've made a new PR #320 which will replace this one.
Thanks for your contributions

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fpistm commented Sep 14, 2018

Merged thanks #320

@fpistm fpistm closed this Sep 14, 2018
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3 participants