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[GDN] Eliminate GPU->CPU sync in prepare_chunk_indices during prefill - #38361
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This pull request introduces a register method to the FLA operations cache utility, enabling manual insertion of entries. This functionality is used in the GDN attention backend to pre-compute chunk indices on the CPU and cache them against GPU keys, preventing performance-degrading GPU-to-CPU synchronization. Feedback includes a recommendation to refactor duplicated cache management logic into a helper function and to replace a hardcoded chunk size with a named constant.
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Hi @arpera, the pre-commit checks have failed. Please run: uv pip install pre-commit>=4.5.1
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cc: @vadiklyutiy |
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/gemini review |
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Code Review
This pull request centralizes the chunk size configuration by introducing a global FLA_CHUNK_SIZE constant across various FLA Triton kernels. It also enhances the tensor_cache utility with a new register method, which allows for manual insertion of entries into the cache. This functionality is utilized in the GDN attention backend to pre-compute chunk indices on the CPU and register them using GPU tensor keys, thereby avoiding performance-degrading GPU-to-CPU synchronizations. I have no feedback to provide as there were no review comments.
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@claude review |
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I agree that storing |
what exact things looked not so good? |
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Hi @arpera, the pre-commit checks have failed. Please run: uv pip install pre-commit>=4.5.1
pre-commit install
pre-commit run --all-filesThen, commit the changes and push to your branch. For future commits, Tip Is
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Initially the patch itself was huge for such a small issue |
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@claude review |
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@claude review |
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@claude review |
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@arpera Thanks for your contribution, do we have some perf and eval tests? |
…vllm-project#38361) Signed-off-by: Artem Perevedentsev <aperevedents@nvidia.com> Signed-off-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com>
…vllm-project#38361) Signed-off-by: Artem Perevedentsev <aperevedents@nvidia.com> Signed-off-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com> Signed-off-by: Rishi Puri <riship@nvidia.com>
…vllm-project#38361) Signed-off-by: Artem Perevedentsev <aperevedents@nvidia.com> Signed-off-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com>
### What this PR does / why we need it? For the fusedmoe: vllm-project/vllm#33049 vllm-project/vllm#35949 FusedMoe refactor For the qwen3_vl: vllm-project/vllm#34539 A new Triton kernel has been added for fast rope position encoding. I've added a patch to fallback to native. We'll consider registering custom operators and implementing ascending later. vllm-project/vllm#38361 ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: - vLLM main: vllm-project/vllm@29e4870 --------- Signed-off-by: wangli <wangli858794774@gmail.com>
### What this PR does / why we need it? For the fusedmoe: vllm-project/vllm#33049 vllm-project/vllm#35949 FusedMoe refactor For the qwen3_vl: vllm-project/vllm#34539 A new Triton kernel has been added for fast rope position encoding. I've added a patch to fallback to native. We'll consider registering custom operators and implementing ascending later. vllm-project/vllm#38361 ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: - vLLM main: vllm-project/vllm@29e4870 --------- Signed-off-by: wangli <wangli858794774@gmail.com>
### What this PR does / why we need it? For the fusedmoe: vllm-project/vllm#33049 vllm-project/vllm#35949 FusedMoe refactor For the qwen3_vl: vllm-project/vllm#34539 A new Triton kernel has been added for fast rope position encoding. I've added a patch to fallback to native. We'll consider registering custom operators and implementing ascending later. vllm-project/vllm#38361 ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: - vLLM main: vllm-project/vllm@29e4870 --------- Signed-off-by: wangli <wangli858794774@gmail.com> Signed-off-by: guxin108 <1252896542@qq.com>
### What this PR does / why we need it? For the fusedmoe: vllm-project/vllm#33049 vllm-project/vllm#35949 FusedMoe refactor For the qwen3_vl: vllm-project/vllm#34539 A new Triton kernel has been added for fast rope position encoding. I've added a patch to fallback to native. We'll consider registering custom operators and implementing ascending later. vllm-project/vllm#38361 ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: - vLLM main: vllm-project/vllm@29e4870 --------- Signed-off-by: wangli <wangli858794774@gmail.com> Signed-off-by: zouyida2052 <zouyida2002@gmail.com>
### What this PR does / why we need it? For the fusedmoe: vllm-project/vllm#33049 vllm-project/vllm#35949 FusedMoe refactor For the qwen3_vl: vllm-project/vllm#34539 A new Triton kernel has been added for fast rope position encoding. I've added a patch to fallback to native. We'll consider registering custom operators and implementing ascending later. vllm-project/vllm#38361 ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: - vLLM main: vllm-project/vllm@29e4870 --------- Signed-off-by: wangli <wangli858794774@gmail.com>
…vllm-project#38361) Signed-off-by: Artem Perevedentsev <aperevedents@nvidia.com> Signed-off-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com>
### What this PR does / why we need it? For the fusedmoe: vllm-project/vllm#33049 vllm-project/vllm#35949 FusedMoe refactor For the qwen3_vl: vllm-project/vllm#34539 A new Triton kernel has been added for fast rope position encoding. I've added a patch to fallback to native. We'll consider registering custom operators and implementing ascending later. vllm-project/vllm#38361 ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: - vLLM main: vllm-project/vllm@29e4870 --------- Signed-off-by: wangli <wangli858794774@gmail.com> Signed-off-by: nanxing <1014662416@qq.com>
…vllm-project#38361) Signed-off-by: Artem Perevedentsev <aperevedents@nvidia.com> Signed-off-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com>
### What this PR does / why we need it? For the fusedmoe: vllm-project/vllm#33049 vllm-project/vllm#35949 FusedMoe refactor For the qwen3_vl: vllm-project/vllm#34539 A new Triton kernel has been added for fast rope position encoding. I've added a patch to fallback to native. We'll consider registering custom operators and implementing ascending later. vllm-project/vllm#38361 ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: - vLLM main: vllm-project/vllm@29e4870 --------- Signed-off-by: wangli <wangli858794774@gmail.com>
### What this PR does / why we need it? For the fusedmoe: vllm-project/vllm#33049 vllm-project/vllm#35949 FusedMoe refactor For the qwen3_vl: vllm-project/vllm#34539 A new Triton kernel has been added for fast rope position encoding. I've added a patch to fallback to native. We'll consider registering custom operators and implementing ascending later. vllm-project/vllm#38361 ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: - vLLM main: vllm-project/vllm@29e4870 --------- Signed-off-by: wangli <wangli858794774@gmail.com>
### What this PR does / why we need it? For the fusedmoe: vllm-project/vllm#33049 vllm-project/vllm#35949 FusedMoe refactor For the qwen3_vl: vllm-project/vllm#34539 A new Triton kernel has been added for fast rope position encoding. I've added a patch to fallback to native. We'll consider registering custom operators and implementing ascending later. vllm-project/vllm#38361 ### Does this PR introduce _any_ user-facing change? ### How was this patch tested? - vLLM version: - vLLM main: vllm-project/vllm@29e4870 --------- Signed-off-by: wangli <wangli858794774@gmail.com> Signed-off-by: xqchen7 <chenxueqing7@huawei.com>

Purpose
Eliminate a GPU→CPU sync caused by
.tolist()insideprepare_chunk_indicesduring GDN prefill.prepare_chunk_indices(invllm/model_executor/layers/fla/ops/index.py) calls.tolist()on a GPU tensor, which triggers a blocking GPU→CPU synchronization. The function is decorated withtensor_cache(identity-based LRU cache), so only the first call per step actually syncs — but that one sync is enough to stall the pipeline.Fix: Pre-compute
chunk_indicesandchunk_offsetson CPU inGDNAttentionMetadataBuilder.build()(wherecu_seqlens_cpuis already available, so no sync needed), async-copy them to GPU, and thread them as explicit optional parameters through the entire FLA ops chain. When provided, downstream ops skip both the computation and thetensor_cachelookup. The@tensor_cachefallback remains unchanged for callers that do not pass pre-computed values (KDA, OLMo Hybrid).Also extracts hardcoded
chunk_size=64intoFLA_CHUNK_SIZEconstant.Changes:
vllm/model_executor/layers/fla/ops/utils.py: addFLA_CHUNK_SIZEconstantvllm/v1/attention/backends/gdn_attn.py: pre-computechunk_indices/chunk_offsetson CPU, store inGDNAttentionMetadatavllm/model_executor/layers/mamba/gdn_linear_attn.py: passchunk_indices/chunk_offsetsfrom metadata to FLA opsvllm/model_executor/layers/fla/ops/chunk.py,cumsum.py,chunk_o.py,chunk_delta_h.py,chunk_scaled_dot_kkt.py,solve_tril.py,wy_fast.py: accept optionalchunk_indices(andchunk_offsetsforchunk_delta_h), skiptensor_cachewhen providedvllm/model_executor/layers/fla/ops/kda.py: useFLA_CHUNK_SIZEconstantTest Plan
vllm serve nvidia/Qwen3.5-397B-A17B-NVFP4with GDN attention and verified no GPU→CPU sync fromprepare_chunk_indicesin Nsight Systems profile.Test Result
Before: Nsight Systems shows a GPU→CPU sync (
.tolist()) on the firstprepare_chunk_indicescall per step during GDN prefill.After: No GPU→CPU sync, no
tensor_cacheoverhead on the GDN prefill path.Perf & Eval Testing
Server (same for all tests):
vllm serve nvidia/Qwen3.5-397B-A17B-NVFP4 \ --port 8000 -tp 1 -pp 1 -dp 8 \ --enable-expert-parallel --language-model-only \ --reasoning-parser qwen3 --stream-interval 100Prefill Benchmark
vllm bench serve --backend vllm --model nvidia/Qwen3.5-397B-A17B-NVFP4 \ --port 8000 --endpoint /v1/completions --dataset-name random \ --random-input 32768 --random-output 1 --max-concurrency 128 \ --num-prompt 128 --ignore-eos --temperature 0.0GSM8K Eval
No perf or accuracy regression — results are within run-to-run noise.
Nsight Systems Profile (prefill, input 8192 tokens)
After this change, the first GDN layer in a step no longer stands out from subsequent GDN layers in CPU time — all GDN blocks are now uniform. Additionally, there are zero DtoH (GPU→CPU) memory copies during execution.
Before: DtoH memcpy is present (<0.1%), the first GDN block stalls on the GPU→CPU sync from
.tolist(), forward ≈ 410 ms.After: No DtoH memcpy at all, all GDN blocks have uniform CPU time, forward ≈ 385 ms.
Essential Elements of an Effective PR Description Checklist
supported_models.mdandexamplesfor a new model.