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[Perf] Batch Weight Prefetching via cuMemcpyBatchAsync to Reduce Latency#41474

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[Perf] Batch Weight Prefetching via cuMemcpyBatchAsync to Reduce Latency#41474
xiaobao520123 wants to merge 1 commit intovllm-project:mainfrom
xiaobao520123:feature/batch_memcpy_prefetch

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@xiaobao520123 xiaobao520123 commented May 1, 2026

Purpose

Current implementation of weight prefetching requires launching cuMemcpyAsync multiple times, which creates driver-call overhead. This overhead accumulates and hurts inference performance because prefetching is hooked up near the end of each layer forward.

Replace per-layer weight prefetching with swap_blocks_batch. swap_blocks_batch utilizes cuMemcpyBatchAsync since CUDA 12.8+. According to the implementation, swap_blocks_batch will fallback to cuMemcpyAsync loop when the feature is not available.

In addition, objects related to CUDA stream synchronization have been optimized to further reduce the overhead.

As a result, it yields >50% latency decrease in triggering prefetching and reduces both TTFT and TPOT/ITL (See the test result below).

Original Trace

Origin_CUDA_Graph_Trace

Trace after This PR

PR_CUDA_Graph_Trace

Test Plan

Hardware

GPU: 1xA100-40GB 40GB, CUDA 12.8/12.9
CPU: 2× Intel Xeon Gold 5318Y @ 2.10 GHz (24 cores/socket, 2 threads/core → 96 logical CPUs, 48 physical cores), max turbo 3.4 GHz, 2 NUMA nodes.
GPU ↔ CPU: PCIe Gen4 x16 (30GB/s R/W theoretical, 25GB/s actual)
Memory: ~690 GiB usable (724 GB raw); DDR4-3200 ECC, running at 2933 MT/s

vLLM

Version:

  • vllm==0.19.1rc1.dev750+ga3ec4a35f.precompiled
  • VLLM_USE_PRECOMPILED=1 VLLM_PRECOMPILED_WHEEL_COMMIT=3527229517f01a5f2406fa6fbf35ff9223c65ed5 uv pip install --editable . --torch -backend=cu129.
  • Last Git Commit: a3ec4a35f5943c250974d504706d22297d423468 [Bugfix][Metrics] Fix RayPrometheusMetric.labels() returning shared labeled child (#40840)

Configuration:

  • Model: Qwen3-8B/Qwen3-32B
  • Max model length: 24k
  • TP: 1
  • GPU util: 90%
  • Offload backend: prefetch
  • Offload groups:
    • Qwen3-8B (Dense, 36 layers): 50% offload; 18 groups, 2 layers each, 1 layer offloaded, ratio: 2:1; Prefetch steps: 2
    • Qwen3-32B (Dense, 64 layers): 75% offload; 16 groups, 4 layers each, 3 layers offloaded, ratio: 4:3; Prefetch steps: 2

vLLM Instance:

vllm serve Qwen/Qwen3-8B \
      --port 8000 \
      --tensor-parallel-size 1 \
      --gpu-memory-utilization 0.9 \
      --max-model-len 24000 \
      --offload-backend prefetch \
      --offload-group-size 2 \
      --offload-num-in-group 1 \
      --offload-prefetch-step 2

Dataset & Benchmark:
Dataset: LongBench-NarrativeQA (Shuffled): Link
QPS: 1
Prompts: 10

Benchmark & Torch Profiling:

vllm bench serve \
  --backend vllm \
  --model Qwen/Qwen3-8B \
  --dataset-name custom \
  --dataset-path /workspace/projects/datasets/narrativeqa_shuffled.jsonl \
  --skip-chat-template \
  --disable-shuffle \
  --num-prompts 10 \
  --request-rate 1 \
  --profile \
  --result-dir [PLACEHOLDER] \
  --result-filename [PLACEHOLDER] \
  --save-result

Test Result

Qwen3-8B

(Major Improvement) Per-prefetch-call Host-side Latency

Mode Variant Calls Mean (μs) Median (μs) P99 (μs) Total host (ms)
CUDA Graph Enabled Original 864 353.4 348.2 432.8 305.3
CUDA Graph Enabled PR 864 159.4 151.9 181.5 137.7
      -54.9% -56.4% -58.1% -54.9%
Eager Original 5,472 342.8 334.4 478.9 1876.1
Eager PR 5,472 149.8 148.4 177.3 819.6
      -56.3% -55.6% -63.0% -56.3%

End-to-end Throughput & Latency

CUDA Graph Enabled

Torch Profile (Original): Link
Torch Profile (cuMemcpyBatchAsync): Link

Metric Unit Original This PR Δ
Output tokens 2 560 2 560 0
Request throughput req/s 0.1161 0.1161 -0.03%
Output throughput tok/s 29.72 29.71 -0.03%
Total token throughput tok/s 1567.5 1567.0 -0.03%
Duration s 86.14 86.17 +0.03%
Mean TTFT ms 4927.3 4912.2 -0.31%
Median TTFT ms 5405.0 5380.3 -0.46%
P99 TTFT ms 8412.0 8392.1 -0.24%
Mean TPOT ms 279.59 279.74 +0.05%
Mean ITL ms 279.59 279.74 +0.05%
Eager

Torch Profile (Original): Link
Torch Profile (cuMemcpyBatchAsync): Link

Metric Unit Original This PR Δ
Output tokens 2 560 2 560 0
Request throughput req/s 0.1154 0.1161 +0.59%
Output throughput tok/s 29.54 29.72 +0.59%
Total token throughput tok/s 1558.2 1567.4 +0.59%
Duration s 86.65 86.14 -0.59%
Mean TTFT ms 5712.3 5446.2 -4.66%
Median TTFT ms 6185.1 5903.3 -4.56%
P99 TTFT ms 9214.3 8938.7 -2.99%
Mean TPOT ms 278.63 277.75 -0.32%
Mean ITL ms 278.63 277.75 -0.32%

Qwen3-32B (Profiling disabled)

  • Qwen3-32B is too large to fit the hardware, and weight offloading/prefetching pushes significant pressure on memory & bandwidth. Therefore, performace gain is realtively small.

End-to-end Throughput & Latency

CUDA Graph Enabled
Metric Unit Original This PR Δ
Output tokens 2 498 2 150 -14%
Request throughput (normalized) req/s 0.01022 0.01022 +0.005%
Output throughput (normalized) tok/s 2.5520 2.5521 +0.005%
Total token throughput (normalized) tok/s 137.88 137.89 +0.005%
Duration (normalized to 2 498 tok) s 978.86 978.81 -0.005%
Mean TTFT ms 251 829 234 892 -6.7%
Median TTFT ms 244 395 98 586 -60%
P99 TTFT ms 498 065 527 317 +5.9%
Mean TPOT ms 1 859.03 1 858.99 -0.002%
Mean ITL ms 1 859.05 1 858.73 -0.017%
Eager
Metric Unit Original This PR Δ
Output tokens 2 192 2 192 0
Request throughput req/s 0.009942 0.009944 +0.02%
Output throughput tok/s 2.1794 2.1798 +0.02%
Total token throughput tok/s 133.880 133.905 +0.02%
Duration s 1005.80 1005.61 -0.02%
Mean TTFT ms 228 152.3 228 059.9 -0.04%
Median TTFT ms 57 661.4 57 594.2 -0.12%
P99 TTFT ms 526 514.9 526 376.7 -0.03%
Mean TPOT ms 1863.00 1862.74 -0.014%
Mean ITL ms 1863.27 1863.01 -0.014%

Essential Elements of an Effective PR Description Checklist
  • The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
  • The test plan, such as providing test command.
  • The test results, such as pasting the results comparison before and after, or e2e results
  • (Optional) The necessary documentation update, such as updating supported_models.md and examples for a new model.

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Code Review

This pull request introduces a performance optimization for parameter prefetching by implementing a fast path that utilizes batched H2D copies via cuMemcpyBatchAsync (through ops.swap_blocks_batch). It adds infrastructure to track buffer pointers and sizes while maintaining a fallback for CUDA graph capture. Feedback suggests initializing the synchronization event with enable_timing=False to further reduce overhead and refactoring the copy logic to ensure that the per-parameter fallback is used whenever the batched path is unavailable, avoiding a potential bug where prefetching might be skipped.

Comment thread vllm/model_executor/offloader/prefetch.py
Comment on lines +574 to +604
if in_capture:
# cuMemcpyBatchAsync is not capture-safe.
# Slow path: Fallbacks to per-param copy_() so they can get recorded into the graph.
for name, offloader in self._param_offloaders.items():
cpu_storage = offloader._cpu_storage
gpu_buffer = offloader._gpu_buffer
assert cpu_storage is not None, "CPU storage not initialized"
assert gpu_buffer is not None, "GPU buffer not assigned"
assert not should_pin_memory() or cpu_storage.is_pinned(), (
f"CPU storage for {name} is not pinned! "
"non_blocking=True H2D copy from non-pinned memory "
"causes stream synchronization that breaks "
"event-based fork synchronization."
)
gpu_buffer.copy_(cpu_storage, non_blocking=True)
elif (
self._buffer_src_ptrs is not None
and self._buffer_dst_ptrs is not None
and self._buffer_sizes is not None
):
# Fast path: batched copy using custom op (single cuMemcpyBatchAsync call on CUDA 12.8+)
# cuMemcpyBatchAsync can have less driver-call overhead and better performance.
# swap_blocks_batch() will fallback to per-param copy_() if cuMemcpyBatchAsync is not available.
ops.swap_blocks_batch(
src_ptrs=self._buffer_src_ptrs,
dst_ptrs=self._buffer_dst_ptrs,
sizes=self._buffer_sizes
)
gpu_buffer.copy_(cpu_storage, non_blocking=True)
else:
# No params to copy (shouldn't normally happen).
pass
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high

The current implementation of the else block (lines 602-604) is a potential bug. If self._buffer_src_ptrs is None (which can happen if parameters were pruned or if a contiguity check fails), the code currently does nothing (pass), meaning weights will never be prefetched for that module.

Additionally, the in_capture path and the fallback path are identical. I suggest refactoring this to use the copy_() loop as a general fallback whenever the fast path is unavailable.

            if (
                not in_capture
                and self._buffer_src_ptrs is not None
                and self._buffer_dst_ptrs is not None
                and self._buffer_sizes is not None
            ):
                # Fast path: batched copy using custom op (single cuMemcpyBatchAsync call on CUDA 12.8+)
                # cuMemcpyBatchAsync can have less driver-call overhead and better performance.
                # swap_blocks_batch() will fallback to per-param copy_() if cuMemcpyBatchAsync is not available.
                ops.swap_blocks_batch(
                    src_ptrs=self._buffer_src_ptrs,
                    dst_ptrs=self._buffer_dst_ptrs,
                    sizes=self._buffer_sizes
                )
            else:
                # Slow path: Fallback to per-param copy_(). 
                # This is used during CUDA graph capture or when tensors are non-contiguous.
                for name, offloader in self._param_offloaders.items():
                    cpu_storage = offloader._cpu_storage
                    gpu_buffer = offloader._gpu_buffer
                    assert cpu_storage is not None, "CPU storage not initialized"
                    assert gpu_buffer is not None, "GPU buffer not assigned"
                    assert not should_pin_memory() or cpu_storage.is_pinned(), (
                        f"CPU storage for {name} is not pinned! "
                        "non_blocking=True H2D copy from non-pinned memory "
                        "causes stream synchronization that breaks "
                        "event-based fork synchronization."
                    )
                    gpu_buffer.copy_(cpu_storage, non_blocking=True)

@minosfuture
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Thanks for the work and detailed data!
Prefetching should be completely hidden behind computation. This would be the case if batch size is large (as it is in prefill). It may be hard on A100 nodes that doesn't have high-bandwidth C2C.
Is this mostly addressing the inter-forward-step prefetching for the first offloaded-layer? What's percentage of the delay on critical path over the whole step latency and why is it accumulating?
CUDA graph incompatibility of cuMemcpyBatchAsync is not great. But it should be compatible with torch.compile?

@xiaobao520123
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xiaobao520123 commented May 2, 2026

@minosfuture, thanks for the question!

Prefetching should be completely hidden behind computation.

Yes, it should. When doing data transfer, current implementation runs in async. Yet, such prefetching on future layers starts at the end after computation on previous layer is complete.

# prefetch.py:210-242
def _hook_module_forward(self, index: int, module: nn.Module):
    original_forward = module.forward

    def forward(*args, **kwargs):
        module.forward = original_forward
        torch.ops.vllm.wait_prefetch(input_tensor, index)

        output = original_forward(*args, **kwargs)

        next_index = (index + self.prefetch_step) % len(self.module_offloaders)

        # NOTICE: start prefetch task immediately after forward completes. 
        if isinstance(output, tuple):
            torch.ops.vllm.start_prefetch(output[0], next_index)
        else:
            torch.ops.vllm.start_prefetch(output, next_index)

        module.forward = forward
        return output

    module.forward = forward

The startup is hooked onto the inference critical path (forward) and because it takes API calls for the CPU to submit tasks to the GPU. This leads to overhead. Keeping this 'hook' scheme, we must reduce such overhead and avoid run bubbles as much as possible.

This would be the case if batch size is large (as it is in prefill). It may be hard on A100 nodes that doesn't have high-bandwidth C2C.

Agree. That’s why we can see bigger latency decrease on TTFT, even bigger in eager mode. One of the biggest application of offloading is when only commodity hardware is available, or running in single node instance. The work is trying to reduce any other factors regardless it is compute/memory/bandwidth-bound.

Is this mostly addressing the inter-forward-step prefetching for the first offloaded-layer?

The savings are per-prefetch-call of inter-forward-steps, applied to every start_prefetch invocation on the critical path, not just the first layer in a step.

What's percentage of the delay on critical path over the whole step latency and why is it accumulating?

In my benchmark, depending on offload_prefetch_step settings, one prefetch launch call stands ~35% of the latency on each layer forward step, and it adds up total ~2.2% of delays on one model execution. start_prefetch is invoked synchronously inside the layer's Python forward hook, between the previous layer's compute and the next kernel launch. Every microsecond spent on the host here directly delays issuing the next kernel — it cannot be hidden behind GPU compute, even when the H2D copy (cuMemcpyAsync) itself can.

CUDA graph incompatibility of cuMemcpyBatchAsync is not great. But it should be compatible with torch.compile?

I hope CUDA official will support it in the future. Nonetheless, everything is still compatible with torch.compile().

@xiaobao520123 xiaobao520123 force-pushed the feature/batch_memcpy_prefetch branch from ccd66dd to 50a217a Compare May 2, 2026 00:07
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