[logeshmcw]

Purpose

vLLM currently ships HIP attention kernels for int8_per_token_head and int4_per_token_head KV caches targeting RDNA3 (the paged_prefill_attn_rdna3.cuh family). This PR adds the CDNA equivalents so the same per-token-head INT8/INT4 KV-cache attention runs on MI300-class GPUs

Existing RDNA3 HIP kernels branch link: https://github.com/JartX/vllm/tree/feat/rdna3_int8_int4_hip_kernels
Ask: #41394 (comment)
Reference PR: #41394

What's added

C++/HIP kernels (csrc/attention/):

• paged_prefill_attn_cdna_int8 / paged_prefill_attn_cdna_int4 — paged-prefill
  attention with INT8 / INT4 per-token-head KV cache.
• pth_decode_int8_cdna / pth_decode_int4_cdna — split-KV paged decode.
• reshape_and_cache_int4_cdna — packs fp16/bf16 K/V into the INT4
  per-token-head paged cache and stores the (scale, zero-point) alongside.
• paged_prefill_attn_cdna.cuh — shared MFMA helpers.

Build & registration:

• CMakeLists.txt adds the new .cu files to the HIP source list, gated on
  gfx942 / gfx950 / gfx90a being selected. The kernels compile to no-op
  stubs on unsupported archs, so adding them is safe regardless of target.
• csrc/ops.h + csrc/torch_bindings.cpp register all ops under USE_ROCM.
• csrc/spinloop.cpp: include <x86intrin.h> instead of the standalone
  <mwaitxintrin.h>, which fails to compile on the ROCm 7.2 / amdclang
  toolchain.

Python integration:

• vllm/v1/attention/ops/cdna_int8_prefill.py and cdna_int4_prefill.py
  wrap the ops (the INT4 wrapper includes the pack_scale_zp helper).
• vllm/v1/attention/backends/triton_attn.py: adds _maybe_dispatch_cdna_pth,
  an opt-in dispatch (env VLLM_USE_CDNA_PTH_ATTN=1). It only engages on MI3xx, with kv_cache_dtype in {int8_per_token_head, int4_per_token_head}, head_size in {64, 128}, and no alibi / sliding-window / sinks / softcap.
  In every other case it returns False and the existing Triton path runs unchanged, so default behavior is unaffected.

Test Plan

1. Kernel correctness (unit tests)

Run on a gfx942/gfx950 build with the ops compiled in. Covers INT8 + INT4,
prefill + decode, fp16/bf16, head_size {64,128}:

VLLM_USE_CDNA_PTH_ATTN=1 pytest -q \
  tests/kernels/attention/test_cdna_int8_prefill.py \
  tests/kernels/attention/test_cdna_int4_prefill.py \
  tests/kernels/attention/test_cdna_int8_decode.py \
  tests/kernels/attention/test_cdna_int4_decode.py

2. End-to-end serving (INT8)

Two configs, same model/dataset, so the only variable is which attention
kernel serves the int8_per_token_head KV cache.

Baseline — existing Triton path:

vllm serve Qwen/Qwen2.5-1.5B-Instruct \
  --port 8000 --host 0.0.0.0 \
  --dtype bfloat16 --max-model-len 4096 \
  --gpu-memory-utilization 0.6 --enforce-eager \
  --kv-cache-dtype int8_per_token_head --calculate-kv-scales

This PR — CDNA HIP kernel (opt-in via env):

VLLM_USE_CDNA_PTH_ATTN=1 vllm serve Qwen/Qwen2.5-1.5B-Instruct \
  --port 8000 --host 0.0.0.0 \
  --dtype bfloat16 --max-model-len 4096 \
  --gpu-memory-utilization 0.6 --enforce-eager \
  --kv-cache-dtype int8_per_token_head --calculate-kv-scales

Identical bench against each server:

vllm bench serve --backend openai \
  --base-url http://localhost:8000 \
  --model Qwen/Qwen2.5-1.5B-Instruct \
  --dataset-name random --num-prompts 100 \
  --random-input-len 1024 --random-output-len 128 \
  --ignore-eos --request-rate inf \
  --metric-percentiles 50,90,99

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[mergify]

This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @logeshmcw.

https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/working-with-forks/syncing-a-fork

[AndreasKaratzas]

You are introducing an env var that is not defined in the envs file. Also env var is not something that we prefer.

[AndreasKaratzas]

Why is this under Triton attention?

[logeshmcw]

TritonAttentionBackend is the backend that owns the per-token-head quantized KV dtypes — int8_per_token_head / fp8_per_token_head are already in its supported_kv_cache_dtypes, and this PR adds int4_per_token_head to the same list. So the CDNA HIP kernels hook in here as an accelerated drop-in for a path this backend already serves, which keeps the per-token-head dtype handling in one place.

That said, I agree the inline logic was too heavy for the backend file. I've moved the whole dispatch out into a dedicated module, vllm/v1/attention/ops/cdna_pth_attn.py; the backend now just makes a single maybe_dispatch_cdna_pth(...) call. we can even relocate the dispatch into a ROCm-specific backend instead if you'd prefer it not live under Triton at all.

[AndreasKaratzas]

Tests look good but I would like a theoretical explanation of where those rtol atol came from.

[logeshmcw]

INT8 (rtol=atol=2e-2): 8-bit quantization has 256 levels, so each KV element carries a rounding error of about half a step relative to its range. Attention sums these errors over the head_size dimension (the Q·K and P·V dot products), where they partly cancel rather than add up, and fp16/MFMA accumulation + softmax add a small floor - so the output error lands around 1%. 2e-2 is ~2× that, leaving margin without masking a real regression.

INT4 (rtol=atol=4e-2): 4-bit has only 16 levels (16× coarser than INT8), so per-element error is ~6-7%; the same dot-product averaging brings the output error down to ~2%, hence 4e-2 (2× the INT8 tolerance). Both values were confirmed against the measured error across all swept shapes.

[tjtanaa]

Please disclose an actual perf benchmark and test data

[depthfirst-app]

🟡 Severity: MEDIUM

Adding int4_per_token_head to supported_kv_cache_dtypes but get_kv_quant_mode() has no mapping for it, so _is_per_token_head_quant is False. Scale caches are never allocated, the CDNA dispatch is bypassed (k_scale_cache is None), and the Triton fallback misinterprets packed int4 cache data as unquantized, producing silently incorrect inference outputs.
Helpful? Add 👍 / 👎

💡 Fix Suggestion

Suggestion: The int4_per_token_head dtype string is advertised as supported but lacks the necessary plumbing in multiple files. To fix this:

1. Add INT4_PER_TOKEN_HEAD to the KVQuantMode enum in vllm/v1/kv_cache_interface.py (after line 43):

   INT4_PER_TOKEN_HEAD = 5  # per-token-head dynamic scales for int4

2. Add a mapping in get_kv_quant_mode() in vllm/v1/kv_cache_interface.py (before the fp8 fallback, around line 65):

   if kv_cache_dtype == "int4_per_token_head":
       return KVQuantMode.INT4_PER_TOKEN_HEAD

3. Update is_per_token_head property in KVQuantMode (line 48-51) to include the new member:

   return self in (
       KVQuantMode.INT8_PER_TOKEN_HEAD,
       KVQuantMode.FP8_PER_TOKEN_HEAD,
       KVQuantMode.INT4_PER_TOKEN_HEAD,
   )

4. Add an entry to STR_DTYPE_TO_TORCH_DTYPE in vllm/utils/torch_utils.py:

   "int4_per_token_head": torch.uint8,

   (Use torch.uint8 since int4 values are packed into uint8 storage.)

Without these changes, using --kv-cache-dtype int4_per_token_head will silently skip quantization (the KV cache is written and read as if unquantized), producing incorrect inference results.

[logeshmcw]

You are introducing an env var that is not defined in the envs file. Also env var is not something that we prefer.

Removed the VLLM_USE_CDNA_PTH_ATTN env var entirely. The CDNA HIP kernels now engage automatically - no opt-in flag - gated purely on capability: ROCm + MI3xx (on_mi3xx()), the compiled ops being present in the build, kv_cache_dtype = {int8,int4}_per_token_head, no alibi/sliding-window/sinks/softcap, and head_size {64,128}. This matches the existing ROCm convention (on_mi3xx()/on_gfx*() auto-selection) and removes the undefined-env-var problem. Fixed in 89ecda9.

[tdoublep]

Triton backend is intended to be platform-agnostic. Why aren't we inserting this CDNA dispatching into one of the ROCm backends instead?

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