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[XPU][Attention] Enable tensor-descriptor Q load for non-power-of-2 GQA (~1.9x Qwen2-7B) - #47248
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The unified attention TD (2D-block I/O) Q-load and output-store were gated off whenever num_queries_per_kv was not a power of 2 (_is_pow2_nq), because the Triton tensor-descriptor validator requires power-of-2 block_shape dims. This left non-pow2 GQA models (e.g. Qwen2-7B, 28/4=7) on the slow pointer Q/O path even when the TD path was available. Enable the TD Q-load for non-pow2 GQA by packing BLOCK_M as BLOCK_Q * next_power_of_2(num_queries_per_kv) and padding the descriptor's head dimension to NQ_PADDED. The descriptor zero-pads the read past the real extent (as it already does for HEAD_SIZE_PADDED); the padding head slots are masked in the kernel (head_in_group < num_queries_per_kv) so they cannot alias the next KV group. The TD store still requires pow2 nq (a padded store would corrupt neighbouring heads) and is gated separately via USE_TD_STORE; non-pow2 nq uses the masked pointer store. compute_tile_loop_bounds' max query-offset uses BLOCK_Q-1 rather than (BLOCK_M-1)//num_queries_per_kv, which overshoots once BLOCK_M is padded. No-op for power-of-2 GQA (NQ_PADDED == num_queries_per_kv). Measured on Arc Pro B60 vs a torch SDPA paged reference (correct in all cases, outputs identical to baseline): Qwen2-7B (nq=7) ~1.9x across prefill, decode, 3D long-context and scattered block tables (e.g. prefill 4k 46.3->24.1 ms); power-of-2 GQA unchanged (GQA=4 prefill 23.931->23.927 ms back-to-back). Signed-off-by: gurwinderintel <gurwinder.singh@intel.com>
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Purpose
The Triton unified attention kernel gates its tensor-descriptor (2D-block I/O) Q-load and output-store off whenever
num_queries_per_kvis not a power of 2 (_is_pow2_nq), because the Triton TD validator requires power-of-2block_shapedims. This leaves non-pow2 GQA models — e.g. Qwen2-7B (28/4 = 7) — on the slow pointer Q/O path even when the TD path is otherwise available.Change
Enable the TD Q-load for non-pow2 GQA:
BLOCK_M = BLOCK_Q * next_power_of_2(num_queries_per_kv)and pad the Q descriptor's head dim toNQ_PADDED. The descriptor zero-pads the read past the real extent (as it already does forHEAD_SIZE_PADDED).head_in_group < num_queries_per_kv) so they can't alias the next KV group.nq(a padded store would corrupt neighbouring heads) — gated separately viaUSE_TD_STORE; non-pow2nquses the masked pointer store.compute_tile_loop_boundsmax query-offset usesBLOCK_Q - 1instead of(BLOCK_M - 1) // num_queries_per_kv, which overshoots onceBLOCK_Mis padded.No-op for power-of-2 GQA (
NQ_PADDED == num_queries_per_kv).Test plan / results (Arc Pro B60, bf16, vs a torch SDPA paged reference)
Verified on this branch. Correct in all cases (outputs identical to baseline):
Power-of-2 GQA controls unchanged (GQA=4 prefill 23.931 -> 23.927 ms back-to-back; GQA=8, GQA=16 sliding-window, decode all no-op and correct).
Scope note: XPU-focused (gated on the TD path); no-op on non-XPU paths that don't set
use_td. Independent of #47246 (prefill BLOCK_M widening); they compose but do not depend on each other.