Support for Microchip PolarFire SoC (MPFS250) #647
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Summary
This PR adds full support for the Microchip PolarFire SoC (MPFS250T) secure boot target, along with a refactoring of GPT (GUID Partition Table) code to make it reusable across multiple architectures.
Key Changes
1. New Platform: Microchip PolarFire SoC (MPFS250)
rv64imac) with five-core CPU cluster (1× E51 monitor core + 4× U54 application cores)hal/mpfs250.c- Hardware abstraction layer implementation (UART and uSD)hal/mpfs250.h- Register definitions and hardware interfaceshal/mpfs250.ld- Linker script for the platformhal/mpfs.dts/hal/mpfs.dtb- Device tree source and binaryhal/mpfs.yaml- HSS payload generator configurationsrc/boot_riscv64.c- RISC-V 64-bit boot logicsrc/boot_riscv64_start.S- Assembly startup codesrc/vector_riscv64.S- Interrupt vector tabletest-app/app_mpfs250.cwith linker scriptconfig/examples/polarfire_mpfs250.config2. GPT Refactoring for Cross-Platform Use
Refactored the x86-specific GPT code into a generic, reusable implementation:
src/gpt.c+include/gpt.h- Platform-independent GPT parsinginclude/disk.h- Common disk interface definitionssrc/x86/gpt.c→src/x86/disk.c(now contains x86-specific disk operations)update_disk.c: Updated to work with the generic GPT interface for non-x86 targets3. Build & CI Updates
test-configs.ymlworkflow for automated build testingarch.mkwith RISCV64 architecture support and MPFS250 target rulesTesting
Documentation
Added comprehensive documentation in
docs/Targets.mdcovering:Future Work (documented)