transformations: (riscv-lower-parallel-mov) Add support for moving floats #5512
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Depends on #5508 |
Codecov Report✅ All modified and coverable lines are covered by tests. Additional details and impacted files@@ Coverage Diff @@
## main #5512 +/- ##
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Coverage 86.02% 86.02%
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| type_to_op: dict[type[riscv.RISCVRegisterType], Callable[..., Operation]] = { | ||
| riscv.IntRegisterType: riscv.MVOp, | ||
| riscv.FloatRegisterType: riscv.FMVOp, | ||
| } |
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Can you please move this out to the top level, and call it _MV_OP_BY_REGISTER_TYPE?
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depends on #5533 |
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- unify the two different casts - makes is_allocated check nicer
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This seems to include changes from #5523, which is marked as draft? |
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Ended up adding the changes here since we need to change those casts here anyway. Will likely close the other PR. |
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In this PR, we extend the ParallelMovOp to support floats for lowering.
In the case of cyclic registers with no free registers, we cannot do the xor trick with floats, therefore we cannot handle this case and raise a PassFailedException.