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mimxrt10xx: Try to get all the RAM banks working #2475

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arturo182 opened this issue Jan 9, 2020 · 0 comments · Fixed by #2532
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mimxrt10xx: Try to get all the RAM banks working #2475

arturo182 opened this issue Jan 9, 2020 · 0 comments · Fixed by #2532
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mimxrt10xx iMX RT based boards such as Teensy 4.x
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6.0.0

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@arturo182
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Right now only 2 out of 3 RAM banks for on both RT1011 and RT1062, meaning we are missing 32KB of RAM on the RT1011 and 128KB on RT1062.

I think it has something to do with how FlexRAM is configured but I couldn't quite get it to work.
@arturo182 arturo182 added the mimxrt10xx iMX RT based boards such as Teensy 4.x label Jan 9, 2020
@arturo182 arturo182 added this to the 6.0.0 milestone Jan 9, 2020
@tannewt tannewt mentioned this issue Jan 18, 2020
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tannewt added a commit that referenced this issue Jan 27, 2020
@tannewt
Refine iMX RT memory layout and add three boards
7d8dac9 
Introduces a way to place CircuitPython code and data into
tightly coupled memory (TCM) which is accessible by the CPU in a
single cycle. It also frees up room in the corresponding cache for
intermittent data. Loading from external flash is slow!

The data cache is also now enabled.

Adds support for the iMX RT 1021 chip. Adds three new boards:
* iMX RT 1020 EVK
* iMX RT 1060 EVK
* Teensy 4.0

Related to #2492, #2472 and #2477. Fixes #2475.
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mimxrt10xx iMX RT based boards such as Teensy 4.x
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Refine iMX RT memory layout and add three boards tannewt/circuitpython
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@arturo182