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I'd like to start marking CircuitPython code and data so we can separate it into specific RAMs. That should speed up all SoCs which have tightly coupled memory (TCM).
Introduces a way to place CircuitPython code and data into
tightly coupled memory (TCM) which is accessible by the CPU in a
single cycle. It also frees up room in the corresponding cache for
intermittent data. Loading from external flash is slow!
The data cache is also now enabled.
Adds support for the iMX RT 1021 chip. Adds three new boards:
* iMX RT 1020 EVK
* iMX RT 1060 EVK
* Teensy 4.0
Related to #2492, #2472 and #2477. Fixes#2475.
We have 1MB of RAM and almost unlimited (well, 8/16/32 MB) code flash, let's do crazy things!
Ideas welcome
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