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Signed-off-by: achand7 <[email protected]>
Changed Dependencies and Supported Platforms to bullet list to avoid unintentional new line removal (.md requires two spaces at the end of line to force new line)
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Merging from Head of intel/intel-graphics-compiler
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Co-authored-by: Warumzer, Jakub <[email protected]>
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Co-authored-by: Warumzer, Jakub <[email protected]>
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…form There are a few bug in fix64bInst() which will generate invalid instructions: Bug #1: (P09.0) mov (4) r[A00(0,1), 0]<1>:df conv96(0,1)<0;1,0>:df After HWConformity => (W&P09.0) mov (1) TV(0,0)<1>:df conv96(0,1)<0;1,0>:df // do anything as only 2nd channel enabled (W) mov (2) r[A00(0,1), 0]<1>:ud TV(0,0)<0;2,1>:ud // do all as it's noMask Bug #2: mov (8|M8) reduceSrc_0(2,0)<1>:df V0210(0,8)<1;1,0>:w After HWConformity => mov (8|M8) TV56(0,0)<4>:w V0210(0,8)<1;1,0>:w mov (8|M8) TV57(0,0)<1>:df TV56(0,0)<16;4,4>:w (W) mov (16) reduceSrc_0(2,0)<1>:ud TV57(0,0)<1;1,0>:ud // noMask is incorrect here There are two functions which are fix64bInst() and fixUnalignedRegions() to check the register regioning issue for 64b instructions. fix64bInst() is for all platforms which have no 64b regioning(CHV, BXT, ICLLP, XeLP, DG2, MTL, ARL). And fixUnalignedRegions() is for Xe_XeHPSDV+ platforms. So, there are duplicated fixes for some platforms like DG2, MTL and ARL. We should avoid invoking fix64bInst() for Xe_XeHPSDV+ platforms, and let fixUnalignedRegions() to fix it later. With this change, above bugs can be fixed.
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Fix a few register regioning issues for 64b instructions on MTL platform There are a few bug in fix64bInst() which will generate invalid instructions: Bug #1: (P09.0) mov (4) r[A00(0,1), 0]<1>:df conv96(0,1)<0;1,0>:df After HWConformity => (W&P09.0) mov (1) TV(0,0)<1>:df conv96(0,1)<0;1,0>:df // do anything as only 2nd channel enabled (W) mov (2) r[A00(0,1), 0]<1>:ud TV(0,0)<0;2,1>:ud // do all as it's noMask Bug #2: mov (8|M8) reduceSrc_0(2,0)<1>:df V0210(0,8)<1;1,0>:w After HWConformity => mov (8|M8) TV56(0,0)<4>:w V0210(0,8)<1;1,0>:w mov (8|M8) TV57(0,0)<1>:df TV56(0,0)<16;4,4>:w (W) mov (16) reduceSrc_0(2,0)<1>:ud TV57(0,0)<1;1,0>:ud // noMask is incorrect here There are two functions which are fix64bInst() and fixUnalignedRegions() to check the register regioning issue for 64b instructions. fix64bInst() is for all platforms which have no 64b regioning(CHV, BXT, ICLLP, XeLP, DG2, MTL, ARL). And fixUnalignedRegions() is for Xe_XeHPSDV+ platforms. So, there are duplicated fixes for some platforms like DG2, MTL and ARL. We should avoid invoking fix64bInst() for Xe_XeHPSDV+ platforms, and let fixUnalignedRegions() to fix it later. With this change, above bugs can be fixed.
VPG-SWE-Github
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…form There are a few bug in fix64bInst() which will generate invalid instructions: Bug #1: (P09.0) mov (4) r[A00(0,1), 0]<1>:df conv96(0,1)<0;1,0>:df After HWConformity => (W&P09.0) mov (1) TV(0,0)<1>:df conv96(0,1)<0;1,0>:df // do anything as only 2nd channel enabled (W) mov (2) r[A00(0,1), 0]<1>:ud TV(0,0)<0;2,1>:ud // do all as it's noMask Bug #2: mov (8|M8) reduceSrc_0(2,0)<1>:df V0210(0,8)<1;1,0>:w After HWConformity => mov (8|M8) TV56(0,0)<4>:w V0210(0,8)<1;1,0>:w mov (8|M8) TV57(0,0)<1>:df TV56(0,0)<16;4,4>:w (W) mov (16) reduceSrc_0(2,0)<1>:ud TV57(0,0)<1;1,0>:ud // noMask is incorrect here There are two functions which are fix64bInst() and fixUnalignedRegions() to check the register regioning issue for 64b instructions. fix64bInst() is for all platforms which have no 64b regioning(CHV, BXT, ICLLP, XeLP, DG2, MTL, ARL). And fixUnalignedRegions() is for Xe_XeHPSDV+ platforms. So, there are duplicated fixes for some platforms like DG2, MTL and ARL. We should avoid invoking fix64bInst() for Xe_XeHPSDV+ platforms, and let fixUnalignedRegions() to fix it later. With this change, above bugs can be fixed.
pszymich
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Dec 19, 2023
…form There are a few bug in fix64bInst() which will generate invalid instructions: Bug #1: (P09.0) mov (4) r[A00(0,1), 0]<1>:df conv96(0,1)<0;1,0>:df After HWConformity => (W&P09.0) mov (1) TV(0,0)<1>:df conv96(0,1)<0;1,0>:df // do anything as only 2nd channel enabled (W) mov (2) r[A00(0,1), 0]<1>:ud TV(0,0)<0;2,1>:ud // do all as it's noMask Bug #2: mov (8|M8) reduceSrc_0(2,0)<1>:df V0210(0,8)<1;1,0>:w After HWConformity => mov (8|M8) TV56(0,0)<4>:w V0210(0,8)<1;1,0>:w mov (8|M8) TV57(0,0)<1>:df TV56(0,0)<16;4,4>:w (W) mov (16) reduceSrc_0(2,0)<1>:ud TV57(0,0)<1;1,0>:ud // noMask is incorrect here There are two functions which are fix64bInst() and fixUnalignedRegions() to check the register regioning issue for 64b instructions. fix64bInst() is for all platforms which have no 64b regioning(CHV, BXT, ICLLP, XeLP, DG2, MTL, ARL). And fixUnalignedRegions() is for Xe_XeHPSDV+ platforms. So, there are duplicated fixes for some platforms like DG2, MTL and ARL. We should avoid invoking fix64bInst() for Xe_XeHPSDV+ platforms, and let fixUnalignedRegions() to fix it later. With this change, above bugs can be fixed. (cherry picked from commit 43681f8)
pszymich
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Dec 20, 2023
…form There are a few bug in fix64bInst() which will generate invalid instructions: Bug #1: (P09.0) mov (4) r[A00(0,1), 0]<1>:df conv96(0,1)<0;1,0>:df After HWConformity => (W&P09.0) mov (1) TV(0,0)<1>:df conv96(0,1)<0;1,0>:df // do anything as only 2nd channel enabled (W) mov (2) r[A00(0,1), 0]<1>:ud TV(0,0)<0;2,1>:ud // do all as it's noMask Bug #2: mov (8|M8) reduceSrc_0(2,0)<1>:df V0210(0,8)<1;1,0>:w After HWConformity => mov (8|M8) TV56(0,0)<4>:w V0210(0,8)<1;1,0>:w mov (8|M8) TV57(0,0)<1>:df TV56(0,0)<16;4,4>:w (W) mov (16) reduceSrc_0(2,0)<1>:ud TV57(0,0)<1;1,0>:ud // noMask is incorrect here There are two functions which are fix64bInst() and fixUnalignedRegions() to check the register regioning issue for 64b instructions. fix64bInst() is for all platforms which have no 64b regioning(CHV, BXT, ICLLP, XeLP, DG2, MTL, ARL). And fixUnalignedRegions() is for Xe_XeHPSDV+ platforms. So, there are duplicated fixes for some platforms like DG2, MTL and ARL. We should avoid invoking fix64bInst() for Xe_XeHPSDV+ platforms, and let fixUnalignedRegions() to fix it later. With this change, above bugs can be fixed. (cherry picked from commit 43681f8)
pszymich
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Dec 20, 2023
…form There are a few bug in fix64bInst() which will generate invalid instructions: Bug #1: (P09.0) mov (4) r[A00(0,1), 0]<1>:df conv96(0,1)<0;1,0>:df After HWConformity => (W&P09.0) mov (1) TV(0,0)<1>:df conv96(0,1)<0;1,0>:df // do anything as only 2nd channel enabled (W) mov (2) r[A00(0,1), 0]<1>:ud TV(0,0)<0;2,1>:ud // do all as it's noMask Bug #2: mov (8|M8) reduceSrc_0(2,0)<1>:df V0210(0,8)<1;1,0>:w After HWConformity => mov (8|M8) TV56(0,0)<4>:w V0210(0,8)<1;1,0>:w mov (8|M8) TV57(0,0)<1>:df TV56(0,0)<16;4,4>:w (W) mov (16) reduceSrc_0(2,0)<1>:ud TV57(0,0)<1;1,0>:ud // noMask is incorrect here There are two functions which are fix64bInst() and fixUnalignedRegions() to check the register regioning issue for 64b instructions. fix64bInst() is for all platforms which have no 64b regioning(CHV, BXT, ICLLP, XeLP, DG2, MTL, ARL). And fixUnalignedRegions() is for Xe_XeHPSDV+ platforms. So, there are duplicated fixes for some platforms like DG2, MTL and ARL. We should avoid invoking fix64bInst() for Xe_XeHPSDV+ platforms, and let fixUnalignedRegions() to fix it later. With this change, above bugs can be fixed. (cherry picked from commit 43681f8)
fda0
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Jan 25, 2024
…form There are a few bug in fix64bInst() which will generate invalid instructions: Bug #1: (P09.0) mov (4) r[A00(0,1), 0]<1>:df conv96(0,1)<0;1,0>:df After HWConformity => (W&P09.0) mov (1) TV(0,0)<1>:df conv96(0,1)<0;1,0>:df // do anything as only 2nd channel enabled (W) mov (2) r[A00(0,1), 0]<1>:ud TV(0,0)<0;2,1>:ud // do all as it's noMask Bug #2: mov (8|M8) reduceSrc_0(2,0)<1>:df V0210(0,8)<1;1,0>:w After HWConformity => mov (8|M8) TV56(0,0)<4>:w V0210(0,8)<1;1,0>:w mov (8|M8) TV57(0,0)<1>:df TV56(0,0)<16;4,4>:w (W) mov (16) reduceSrc_0(2,0)<1>:ud TV57(0,0)<1;1,0>:ud // noMask is incorrect here There are two functions which are fix64bInst() and fixUnalignedRegions() to check the register regioning issue for 64b instructions. fix64bInst() is for all platforms which have no 64b regioning(CHV, BXT, ICLLP, XeLP, DG2, MTL, ARL). And fixUnalignedRegions() is for Xe_XeHPSDV+ platforms. So, there are duplicated fixes for some platforms like DG2, MTL and ARL. We should avoid invoking fix64bInst() for Xe_XeHPSDV+ platforms, and let fixUnalignedRegions() to fix it later. With this change, above bugs can be fixed. (cherry picked from commit 620c74c)
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Changed Dependencies and Supported Platforms to bullet list to avoid unintentional new line removal (.md requires two spaces at the end of line to force new line)