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[SYCL][ESIMD] Enable type rewriting in spirv writer adaptor #2718

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@asi-sc asi-sc commented Nov 2, 2020

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@@ -942,7 +942,8 @@ void EmitAssemblyHelper::EmitAssembly(BackendAction Action,
PerModulePasses.add(createDeadArgEliminationSYCLPass());

if (LangOpts.SYCLIsDevice && LangOpts.SYCLExplicitSIMD)
PerModulePasses.add(createGenXSPIRVWriterAdaptorPass());
PerModulePasses.add(
createGenXSPIRVWriterAdaptorPass(/*RewriteTypes=*/true));
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I am not entirely sure what this change does. Can you provide some details in the commit description?
Please add an appropriate test as well.

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@Fznamznon Fznamznon Nov 3, 2020

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Yes, it would be great to have some context here. Although I'm not sure if front-end test is required. I think this thing enables some functionality of the GenXSPIRVWriterAdaptorPass which is likely already tested by LIT suite for this particular pass.

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Sure, I'll add some details in the next iteration of this change. We've realized that an additional change in vc-intrinsics (library where GenXSPIRVAdaptorPass comes from) is required. So, I mark the pull request as a draft for now.

@asi-sc asi-sc marked this pull request as draft November 3, 2020 10:46
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asi-sc commented Nov 16, 2020

The approach has been changed slightly in libigc vector compute backend. This change is no longer necessary.

@asi-sc asi-sc closed this Nov 16, 2020
jsji pushed a commit that referenced this pull request Sep 21, 2024
Per cl_intel_subgroups_short V 1.1.0 short16 is allowed for these
builtins.

Signed-off-by: Sidorov, Dmitry <[email protected]>

Original commit:
KhronosGroup/SPIRV-LLVM-Translator@6895a2eb5d053d8
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3 participants