[upstream_ut] NVFP4 scaled_mm tests skipped on Xe3 iGPU due to Xe2_Or_Later gate (pass when gate bypassed) #6172

🐛 Describe the bug

On an Xe3 integrated GPU, all NVFP4 cases in test/test_scaled_matmul_cuda.py are skipped with NVFP4 numerics require Xe2+ on XPU, even though the hardware is newer than Xe2 and the tests pass once the gate is bypassed.

Affected tests:

• TestFP8MatmulXPU.test_blockwise_nvfp4_with_global_scale_*_xpu: all 11 cases skipped
• TestFP8MatmulXPU.test_blockwise_mxfp8_nvfp4_mxfp4_numerics_*_xpu: 112 nvfp4 cases skipped with the same reason

Root cause: both tests use Xe2_Or_Later from torch/testing/_internal/common_xpu.py. _DEVICE_ID_TO_CODENAME only lists PVC and BMG device IDs, so any other device (including Xe2/Xe3 integrated GPUs) maps to XPUArch.Unknown and Xe2_Or_Later evaluates to False. The generic problem is tracked in #5946. This issue tracks the resulting loss of NVFP4 _scaled_mm coverage, which should be verified once #5946 is fixed.

Result with Xe2_Or_Later forced to True on the same machine:

The remaining skips in test_blockwise_mxfp8_nvfp4_mxfp4_numerics are expected: fast_accum is not supported, shape constraints apply, or the case is only defined for M == K == N.

Reproducer (run from pytorch/test):

# default: NVFP4 cases skipped
python -m pytest -q test_scaled_matmul_cuda.py -rs \
  -k "TestFP8MatmulXPU and test_blockwise_nvfp4_with_global_scale"

# with the gate forced on: all pass
cat > _force_xe2.py <<'EOF'
import torch.testing._internal.common_xpu as cx
cx.Xe2_Or_Later = True
import test_scaled_matmul_cuda as m
m.Xe2_Or_Later = True
from test_scaled_matmul_cuda import *  # noqa: F403
EOF
python -m pytest -q _force_xe2.py -rs \
  -k "TestFP8MatmulXPU and test_blockwise_nvfp4_with_global_scale"

Expected

NVFP4 _scaled_mm tests run on all Xe2-or-later XPUs, including integrated GPUs. Either:

• fix Xe2_Or_Later detection (Xe2_Or_Later flag doesn't handle Xe3 architecture - it treats them as Unknown architectures. #5946), or
• gate these tests on a capability check (for example, whether the device supports the required FP4/FP8 matrix instructions) instead of a hard-coded device ID list.

Once the gate is fixed, these cases should be part of the regular XPU UT runs.

Versions

• PyTorch: 2.16.0a0+git8cf5c79
• torch.version.xpu: 20260200
• Python: 3.12.15
• OS: Ubuntu 24.04 LTS
• GPU: Intel integrated GPU (Xe3)