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4 x i8 u/srem causes internal compiler error in nvptx instruction selection #69124
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Also, sign-extending the result of a <4 x i8> comparison fails in a similar way:
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We should've expanded those ops into individual elements. I'll fix it shortly. |
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Thanks! |
Let me know if you see any other corner cases. introduction of v2i16 support uncovered disturbingly many corner cases in how we handle v4i8 (and i8 in general), so I'm not completely sure we've covered all of them. |
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The failures below are with commit 546c3d7
I believe this started happening last week (Oct 9-13) . The obvious commit to suspect is cbafb6f
The following .ll:
When compiled with llc with no args, produces the crash dump below:
Trying out some variants, I found that:
Increasing the alignment on the loads and store to 4 produces a simpler error:
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