[LLVM] Use {} instead of std::nullopt to initialize empty ArrayRef #109133
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It is almost always simpler to use {} instead of std::nullopt to
initialize an empty ArrayRef. This patch changes all occurrences I could
find in LLVM itself. In future the ArrayRef(std::nullopt_t) constructor
could be deprecated or removed.
llvmbot
added
backend:ARM
backend:AArch64
backend:AMDGPU
backend:Hexagon
backend:RISC-V
backend:PowerPC
backend:SystemZ
backend:WebAssembly
backend:X86
llvm:regalloc
debuginfo
mc
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@kazutakahirata what do you think? |
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@llvm/pr-subscribers-llvm-transforms @llvm/pr-subscribers-backend-risc-v Author: Jay Foad (jayfoad) Changes
Patch is 152.66 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/109133.diff 108 Files Affected:
diff --git a/llvm/include/llvm/ADT/TinyPtrVector.h b/llvm/include/llvm/ADT/TinyPtrVector.h
index fa2bcd8933a0a2..501500793509ae 100644
--- a/llvm/include/llvm/ADT/TinyPtrVector.h
+++ b/llvm/include/llvm/ADT/TinyPtrVector.h
@@ -135,7 +135,7 @@ class TinyPtrVector {
// implicit conversion operator to ArrayRef.
operator ArrayRef<EltTy>() const {
if (Val.isNull())
- return std::nullopt;
+ return {};
if (isa<EltTy>(Val))
return *Val.getAddrOfPtr1();
return *cast<VecTy *>(Val);
@@ -144,7 +144,7 @@ class TinyPtrVector {
// implicit conversion operator to MutableArrayRef.
operator MutableArrayRef<EltTy>() {
if (Val.isNull())
- return std::nullopt;
+ return {};
if (isa<EltTy>(Val))
return *Val.getAddrOfPtr1();
return *cast<VecTy *>(Val);
diff --git a/llvm/include/llvm/Analysis/ScalarEvolution.h b/llvm/include/llvm/Analysis/ScalarEvolution.h
index 89f9395959779d..44fb249d584d88 100644
--- a/llvm/include/llvm/Analysis/ScalarEvolution.h
+++ b/llvm/include/llvm/Analysis/ScalarEvolution.h
@@ -1130,11 +1130,10 @@ class ScalarEvolution {
/// as arguments and asserts enforce that internally.
/*implicit*/ ExitLimit(const SCEV *E);
- ExitLimit(
- const SCEV *E, const SCEV *ConstantMaxNotTaken,
- const SCEV *SymbolicMaxNotTaken, bool MaxOrZero,
- ArrayRef<const SmallPtrSetImpl<const SCEVPredicate *> *> PredSetList =
- std::nullopt);
+ ExitLimit(const SCEV *E, const SCEV *ConstantMaxNotTaken,
+ const SCEV *SymbolicMaxNotTaken, bool MaxOrZero,
+ ArrayRef<const SmallPtrSetImpl<const SCEVPredicate *> *>
+ PredSetList = {});
ExitLimit(const SCEV *E, const SCEV *ConstantMaxNotTaken,
const SCEV *SymbolicMaxNotTaken, bool MaxOrZero,
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h
index 3411163549de2f..cd69a8a371b6e8 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfo.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h
@@ -1279,8 +1279,7 @@ class TargetTransformInfo {
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
TTI::OperandValueInfo Opd1Info = {TTI::OK_AnyValue, TTI::OP_None},
TTI::OperandValueInfo Opd2Info = {TTI::OK_AnyValue, TTI::OP_None},
- ArrayRef<const Value *> Args = std::nullopt,
- const Instruction *CxtI = nullptr,
+ ArrayRef<const Value *> Args = {}, const Instruction *CxtI = nullptr,
const TargetLibraryInfo *TLibInfo = nullptr) const;
/// Returns the cost estimation for alternating opcode pattern that can be
@@ -1303,11 +1302,12 @@ class TargetTransformInfo {
/// passed through \p Args, which helps improve the cost estimation in some
/// cases, like in broadcast loads.
/// NOTE: For subvector extractions Tp represents the source type.
- InstructionCost getShuffleCost(
- ShuffleKind Kind, VectorType *Tp, ArrayRef<int> Mask = std::nullopt,
- TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, int Index = 0,
- VectorType *SubTp = nullptr, ArrayRef<const Value *> Args = std::nullopt,
- const Instruction *CxtI = nullptr) const;
+ InstructionCost
+ getShuffleCost(ShuffleKind Kind, VectorType *Tp, ArrayRef<int> Mask = {},
+ TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
+ int Index = 0, VectorType *SubTp = nullptr,
+ ArrayRef<const Value *> Args = {},
+ const Instruction *CxtI = nullptr) const;
/// Represents a hint about the context in which a cast is used.
///
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
index 2819af30cd1704..c592bc8f6ba2a1 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
@@ -605,7 +605,7 @@ class TargetTransformInfoImplBase {
ArrayRef<int> Mask,
TTI::TargetCostKind CostKind, int Index,
VectorType *SubTp,
- ArrayRef<const Value *> Args = std::nullopt,
+ ArrayRef<const Value *> Args = {},
const Instruction *CxtI = nullptr) const {
return 1;
}
@@ -1176,7 +1176,7 @@ class TargetTransformInfoImplCRTPBase : public TargetTransformInfoImplBase {
Cost += static_cast<T *>(this)->getArithmeticInstrCost(
Instruction::Add, GEP->getType(), CostKind,
{TTI::OK_AnyValue, TTI::OP_None}, {TTI::OK_AnyValue, TTI::OP_None},
- std::nullopt);
+ {});
} else {
SmallVector<const Value *> Indices(GEP->indices());
Cost += static_cast<T *>(this)->getGEPCost(GEP->getSourceElementType(),
diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
index 2f2a6a09ffc44d..7198e134a2d262 100644
--- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -897,8 +897,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
TTI::OperandValueInfo Opd1Info = {TTI::OK_AnyValue, TTI::OP_None},
TTI::OperandValueInfo Opd2Info = {TTI::OK_AnyValue, TTI::OP_None},
- ArrayRef<const Value *> Args = std::nullopt,
- const Instruction *CxtI = nullptr) {
+ ArrayRef<const Value *> Args = {}, const Instruction *CxtI = nullptr) {
// Check if any of the operands are vector operands.
const TargetLoweringBase *TLI = getTLI();
int ISD = TLI->InstructionOpcodeToISD(Opcode);
@@ -1023,7 +1022,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
ArrayRef<int> Mask,
TTI::TargetCostKind CostKind, int Index,
VectorType *SubTp,
- ArrayRef<const Value *> Args = std::nullopt,
+ ArrayRef<const Value *> Args = {},
const Instruction *CxtI = nullptr) {
switch (improveShuffleKindFromMask(Kind, Mask, Tp, Index, SubTp)) {
case TTI::SK_Broadcast:
@@ -1657,9 +1656,9 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
if (isa<ScalableVectorType>(RetTy))
return BaseT::getIntrinsicInstrCost(ICA, CostKind);
unsigned Index = cast<ConstantInt>(Args[1])->getZExtValue();
- return thisT()->getShuffleCost(
- TTI::SK_ExtractSubvector, cast<VectorType>(Args[0]->getType()),
- std::nullopt, CostKind, Index, cast<VectorType>(RetTy));
+ return thisT()->getShuffleCost(TTI::SK_ExtractSubvector,
+ cast<VectorType>(Args[0]->getType()), {},
+ CostKind, Index, cast<VectorType>(RetTy));
}
case Intrinsic::vector_insert: {
// FIXME: Handle case where a scalable vector is inserted into a scalable
@@ -1668,19 +1667,19 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
return BaseT::getIntrinsicInstrCost(ICA, CostKind);
unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
return thisT()->getShuffleCost(
- TTI::SK_InsertSubvector, cast<VectorType>(Args[0]->getType()),
- std::nullopt, CostKind, Index, cast<VectorType>(Args[1]->getType()));
+ TTI::SK_InsertSubvector, cast<VectorType>(Args[0]->getType()), {},
+ CostKind, Index, cast<VectorType>(Args[1]->getType()));
}
case Intrinsic::vector_reverse: {
- return thisT()->getShuffleCost(
- TTI::SK_Reverse, cast<VectorType>(Args[0]->getType()), std::nullopt,
- CostKind, 0, cast<VectorType>(RetTy));
+ return thisT()->getShuffleCost(TTI::SK_Reverse,
+ cast<VectorType>(Args[0]->getType()), {},
+ CostKind, 0, cast<VectorType>(RetTy));
}
case Intrinsic::vector_splice: {
unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
- return thisT()->getShuffleCost(
- TTI::SK_Splice, cast<VectorType>(Args[0]->getType()), std::nullopt,
- CostKind, Index, cast<VectorType>(RetTy));
+ return thisT()->getShuffleCost(TTI::SK_Splice,
+ cast<VectorType>(Args[0]->getType()), {},
+ CostKind, Index, cast<VectorType>(RetTy));
}
case Intrinsic::vector_reduce_add:
case Intrinsic::vector_reduce_mul:
@@ -2600,9 +2599,8 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
while (NumVecElts > MVTLen) {
NumVecElts /= 2;
VectorType *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
- ShuffleCost +=
- thisT()->getShuffleCost(TTI::SK_ExtractSubvector, Ty, std::nullopt,
- CostKind, NumVecElts, SubTy);
+ ShuffleCost += thisT()->getShuffleCost(TTI::SK_ExtractSubvector, Ty, {},
+ CostKind, NumVecElts, SubTy);
ArithCost += thisT()->getArithmeticInstrCost(Opcode, SubTy, CostKind);
Ty = SubTy;
++LongVectorCount;
@@ -2618,7 +2616,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
// By default reductions need one shuffle per reduction level.
ShuffleCost +=
NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
- std::nullopt, CostKind, 0, Ty);
+ {}, CostKind, 0, Ty);
ArithCost +=
NumReduxLevels * thisT()->getArithmeticInstrCost(Opcode, Ty, CostKind);
return ShuffleCost + ArithCost +
@@ -2691,9 +2689,8 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
NumVecElts /= 2;
auto *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
- ShuffleCost +=
- thisT()->getShuffleCost(TTI::SK_ExtractSubvector, Ty, std::nullopt,
- CostKind, NumVecElts, SubTy);
+ ShuffleCost += thisT()->getShuffleCost(TTI::SK_ExtractSubvector, Ty, {},
+ CostKind, NumVecElts, SubTy);
IntrinsicCostAttributes Attrs(IID, SubTy, {SubTy, SubTy}, FMF);
MinMaxCost += getIntrinsicInstrCost(Attrs, CostKind);
@@ -2709,7 +2706,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
// architecture-dependent length.
ShuffleCost +=
NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
- std::nullopt, CostKind, 0, Ty);
+ {}, CostKind, 0, Ty);
IntrinsicCostAttributes Attrs(IID, Ty, {Ty, Ty}, FMF);
MinMaxCost += NumReduxLevels * getIntrinsicInstrCost(Attrs, CostKind);
// The last min/max should be in vector registers and we counted it above.
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h b/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
index 6f79313c41862e..1f969788d2088e 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
@@ -409,20 +409,21 @@ class CallLowering {
/// \p Handler to move them to the assigned locations.
///
/// \return True if everything has succeeded, false otherwise.
- bool determineAndHandleAssignments(
- ValueHandler &Handler, ValueAssigner &Assigner,
- SmallVectorImpl<ArgInfo> &Args, MachineIRBuilder &MIRBuilder,
- CallingConv::ID CallConv, bool IsVarArg,
- ArrayRef<Register> ThisReturnRegs = std::nullopt) const;
+ bool
+ determineAndHandleAssignments(ValueHandler &Handler, ValueAssigner &Assigner,
+ SmallVectorImpl<ArgInfo> &Args,
+ MachineIRBuilder &MIRBuilder,
+ CallingConv::ID CallConv, bool IsVarArg,
+ ArrayRef<Register> ThisReturnRegs = {}) const;
/// Use \p Handler to insert code to handle the argument/return values
/// represented by \p Args. It's expected determineAssignments previously
/// processed these arguments to populate \p CCState and \p ArgLocs.
- bool
- handleAssignments(ValueHandler &Handler, SmallVectorImpl<ArgInfo> &Args,
- CCState &CCState, SmallVectorImpl<CCValAssign> &ArgLocs,
- MachineIRBuilder &MIRBuilder,
- ArrayRef<Register> ThisReturnRegs = std::nullopt) const;
+ bool handleAssignments(ValueHandler &Handler, SmallVectorImpl<ArgInfo> &Args,
+ CCState &CCState,
+ SmallVectorImpl<CCValAssign> &ArgLocs,
+ MachineIRBuilder &MIRBuilder,
+ ArrayRef<Register> ThisReturnRegs = {}) const;
/// Check whether parameters to a call that are passed in callee saved
/// registers are the same as from the calling function. This needs to be
diff --git a/llvm/include/llvm/CodeGen/LiveRangeEdit.h b/llvm/include/llvm/CodeGen/LiveRangeEdit.h
index 0950c20325fb02..3a4a76d99c5c20 100644
--- a/llvm/include/llvm/CodeGen/LiveRangeEdit.h
+++ b/llvm/include/llvm/CodeGen/LiveRangeEdit.h
@@ -237,7 +237,7 @@ class LiveRangeEdit : private MachineRegisterInfo::Delegate {
/// allocator. These registers should not be split into new intervals
/// as currently those new intervals are not guaranteed to spill.
void eliminateDeadDefs(SmallVectorImpl<MachineInstr *> &Dead,
- ArrayRef<Register> RegsBeingSpilled = std::nullopt);
+ ArrayRef<Register> RegsBeingSpilled = {});
/// calculateRegClassAndHint - Recompute register class and hint for each new
/// register.
diff --git a/llvm/include/llvm/CodeGen/MachineTraceMetrics.h b/llvm/include/llvm/CodeGen/MachineTraceMetrics.h
index a5e78d47724d82..c7d97597d551cd 100644
--- a/llvm/include/llvm/CodeGen/MachineTraceMetrics.h
+++ b/llvm/include/llvm/CodeGen/MachineTraceMetrics.h
@@ -295,9 +295,9 @@ class MachineTraceMetrics : public MachineFunctionPass {
/// classes are included. For the caller to account for extra machine
/// instructions, it must first resolve each instruction's scheduling class.
unsigned getResourceLength(
- ArrayRef<const MachineBasicBlock *> Extrablocks = std::nullopt,
- ArrayRef<const MCSchedClassDesc *> ExtraInstrs = std::nullopt,
- ArrayRef<const MCSchedClassDesc *> RemoveInstrs = std::nullopt) const;
+ ArrayRef<const MachineBasicBlock *> Extrablocks = {},
+ ArrayRef<const MCSchedClassDesc *> ExtraInstrs = {},
+ ArrayRef<const MCSchedClassDesc *> RemoveInstrs = {}) const;
/// Return the length of the (data dependency) critical path through the
/// trace.
diff --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
index a3bfc63f2a4790..c944a96aee61a1 100644
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -2007,7 +2007,7 @@ class TargetInstrInfo : public MCInstrInfo {
/// defined by this method.
virtual ArrayRef<std::pair<int, const char *>>
getSerializableTargetIndices() const {
- return std::nullopt;
+ return {};
}
/// Decompose the machine operand's target flags into two values - the direct
@@ -2024,7 +2024,7 @@ class TargetInstrInfo : public MCInstrInfo {
/// defined by this method.
virtual ArrayRef<std::pair<unsigned, const char *>>
getSerializableDirectMachineOperandTargetFlags() const {
- return std::nullopt;
+ return {};
}
/// Return an array that contains the bitmask target flag values and their
@@ -2034,7 +2034,7 @@ class TargetInstrInfo : public MCInstrInfo {
/// defined by this method.
virtual ArrayRef<std::pair<unsigned, const char *>>
getSerializableBitmaskMachineOperandTargetFlags() const {
- return std::nullopt;
+ return {};
}
/// Return an array that contains the MMO target flag values and their
@@ -2044,7 +2044,7 @@ class TargetInstrInfo : public MCInstrInfo {
/// defined by this method.
virtual ArrayRef<std::pair<MachineMemOperand::Flags, const char *>>
getSerializableMachineMemOperandTargetFlags() const {
- return std::nullopt;
+ return {};
}
/// Determines whether \p Inst is a tail call instruction. Override this
diff --git a/llvm/include/llvm/IR/DIBuilder.h b/llvm/include/llvm/IR/DIBuilder.h
index 97ea38f041baad..a5655f630fc4f0 100644
--- a/llvm/include/llvm/IR/DIBuilder.h
+++ b/llvm/include/llvm/IR/DIBuilder.h
@@ -772,7 +772,7 @@ namespace llvm {
/// Create a new descriptor for the specified
/// variable which has a complex address expression for its address.
/// \param Addr An array of complex address operations.
- DIExpression *createExpression(ArrayRef<uint64_t> Addr = std::nullopt);
+ DIExpression *createExpression(ArrayRef<uint64_t> Addr = {});
/// Create an expression for a variable that does not have an address, but
/// does have a constant value.
diff --git a/llvm/include/llvm/IR/DebugInfoMetadata.h b/llvm/include/llvm/IR/DebugInfoMetadata.h
index e8fdc0bacc6630..d2b4e900438d37 100644
--- a/llvm/include/llvm/IR/DebugInfoMetadata.h
+++ b/llvm/include/llvm/IR/DebugInfoMetadata.h
@@ -138,7 +138,7 @@ class DINode : public MDNode {
protected:
DINode(LLVMContext &C, unsigned ID, StorageType Storage, unsigned Tag,
- ArrayRef<Metadata *> Ops1, ArrayRef<Metadata *> Ops2 = std::nullopt)
+ ArrayRef<Metadata *> Ops1, ArrayRef<Metadata *> Ops2 = {})
: MDNode(C, ID, Storage, Ops1, Ops2) {
assert(Tag < 1u << 16);
SubclassData16 = Tag;
@@ -311,7 +311,7 @@ class DIAssignID : public MDNode {
friend class MDNode;
DIAssignID(LLVMContext &C, StorageType Storage)
- : MDNode(C, DIAssignIDKind, Storage, std::nullopt) {}
+ : MDNode(C, DIAssignIDKind, Storage, {}) {}
~DIAssignID() { dropAllReferences(); }
@@ -2730,7 +2730,7 @@ class DIExpression : public MDNode {
std::vector<uint64_t> Elements;
DIExpression(LLVMContext &C, StorageType Storage, ArrayRef<uint64_t> Elements)
- : MDNode(C, DIExpressionKind, Storage, std::nullopt),
+ : MDNode(C, DIExpressionKind, Storage, {}),
Elements(Elements.begin(), Elements.end()) {}
~DIExpression() = default;
@@ -3776,8 +3776,7 @@ class DIMacroNode : public MDNode {
protected:
DIMacroNode(LLVMContext &C, unsigned ID, StorageType Storage, unsigned MIType,
- ArrayRef<Metadata *> Ops1,
- ArrayRef<Metadata *> Ops2 = std::nullopt)
+ ArrayRef<Metadata *> Ops1, ArrayRef<Metadata *> Ops2 = {})
: MDNode(C, ID, Storage, Ops1, Ops2) {
assert(MIType < 1u << 16);
SubclassData16 = MIType;
diff --git a/llvm/include/llvm/IR/DerivedTypes.h b/llvm/include/llvm/IR/DerivedTypes.h
index d31654ac131d24..975c142f1a4572 100644
--- a/llvm/include/llvm/IR/DerivedTypes.h
+++ b/llvm/include/llvm/IR/DerivedTypes.h
@@ -733,16 +733,16 @@ class TargetExtType : public Type {
/// Return a target extension type having the specified name and optional
/// type and integer parameters.
static TargetExtType *get(LLVMContext &Context, StringRef Name,
- ArrayRef<Type *> Types = std::nullopt,
- ArrayRef<unsigned> Ints = std::nullopt);
+ ArrayRef<Type *> Types = {},
+ ArrayRef<unsigned> Ints = {});
/// Return a target extension type having the specified name and optional
/// type and integer parameters, or an appropriate Error if it fails the
/// parameters check.
- static Expected<TargetExtType *>
- getOrError(LLVMContext &Context, StringRef Name,
- ArrayRef<Type *> Types = std::nullopt,
- ArrayRef<unsigned> Ints = std::nullopt);
+ static Expected<TargetExtType *> getOrError(LLVMContext &Context,
+ StringRef Name,
+ ArrayRef<Type *> Types = {},
+ ArrayRe...
[truncated]
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@llvm/pr-subscribers-backend-arm Author: Jay Foad (jayfoad) Changes
Patch is 152.66 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/109133.diff 108 Files Affected:
diff --git a/llvm/include/llvm/ADT/TinyPtrVector.h b/llvm/include/llvm/ADT/TinyPtrVector.h
index fa2bcd8933a0a2..501500793509ae 100644
--- a/llvm/include/llvm/ADT/TinyPtrVector.h
+++ b/llvm/include/llvm/ADT/TinyPtrVector.h
@@ -135,7 +135,7 @@ class TinyPtrVector {
// implicit conversion operator to ArrayRef.
operator ArrayRef<EltTy>() const {
if (Val.isNull())
- return std::nullopt;
+ return {};
if (isa<EltTy>(Val))
return *Val.getAddrOfPtr1();
return *cast<VecTy *>(Val);
@@ -144,7 +144,7 @@ class TinyPtrVector {
// implicit conversion operator to MutableArrayRef.
operator MutableArrayRef<EltTy>() {
if (Val.isNull())
- return std::nullopt;
+ return {};
if (isa<EltTy>(Val))
return *Val.getAddrOfPtr1();
return *cast<VecTy *>(Val);
diff --git a/llvm/include/llvm/Analysis/ScalarEvolution.h b/llvm/include/llvm/Analysis/ScalarEvolution.h
index 89f9395959779d..44fb249d584d88 100644
--- a/llvm/include/llvm/Analysis/ScalarEvolution.h
+++ b/llvm/include/llvm/Analysis/ScalarEvolution.h
@@ -1130,11 +1130,10 @@ class ScalarEvolution {
/// as arguments and asserts enforce that internally.
/*implicit*/ ExitLimit(const SCEV *E);
- ExitLimit(
- const SCEV *E, const SCEV *ConstantMaxNotTaken,
- const SCEV *SymbolicMaxNotTaken, bool MaxOrZero,
- ArrayRef<const SmallPtrSetImpl<const SCEVPredicate *> *> PredSetList =
- std::nullopt);
+ ExitLimit(const SCEV *E, const SCEV *ConstantMaxNotTaken,
+ const SCEV *SymbolicMaxNotTaken, bool MaxOrZero,
+ ArrayRef<const SmallPtrSetImpl<const SCEVPredicate *> *>
+ PredSetList = {});
ExitLimit(const SCEV *E, const SCEV *ConstantMaxNotTaken,
const SCEV *SymbolicMaxNotTaken, bool MaxOrZero,
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h
index 3411163549de2f..cd69a8a371b6e8 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfo.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h
@@ -1279,8 +1279,7 @@ class TargetTransformInfo {
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
TTI::OperandValueInfo Opd1Info = {TTI::OK_AnyValue, TTI::OP_None},
TTI::OperandValueInfo Opd2Info = {TTI::OK_AnyValue, TTI::OP_None},
- ArrayRef<const Value *> Args = std::nullopt,
- const Instruction *CxtI = nullptr,
+ ArrayRef<const Value *> Args = {}, const Instruction *CxtI = nullptr,
const TargetLibraryInfo *TLibInfo = nullptr) const;
/// Returns the cost estimation for alternating opcode pattern that can be
@@ -1303,11 +1302,12 @@ class TargetTransformInfo {
/// passed through \p Args, which helps improve the cost estimation in some
/// cases, like in broadcast loads.
/// NOTE: For subvector extractions Tp represents the source type.
- InstructionCost getShuffleCost(
- ShuffleKind Kind, VectorType *Tp, ArrayRef<int> Mask = std::nullopt,
- TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, int Index = 0,
- VectorType *SubTp = nullptr, ArrayRef<const Value *> Args = std::nullopt,
- const Instruction *CxtI = nullptr) const;
+ InstructionCost
+ getShuffleCost(ShuffleKind Kind, VectorType *Tp, ArrayRef<int> Mask = {},
+ TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
+ int Index = 0, VectorType *SubTp = nullptr,
+ ArrayRef<const Value *> Args = {},
+ const Instruction *CxtI = nullptr) const;
/// Represents a hint about the context in which a cast is used.
///
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
index 2819af30cd1704..c592bc8f6ba2a1 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
@@ -605,7 +605,7 @@ class TargetTransformInfoImplBase {
ArrayRef<int> Mask,
TTI::TargetCostKind CostKind, int Index,
VectorType *SubTp,
- ArrayRef<const Value *> Args = std::nullopt,
+ ArrayRef<const Value *> Args = {},
const Instruction *CxtI = nullptr) const {
return 1;
}
@@ -1176,7 +1176,7 @@ class TargetTransformInfoImplCRTPBase : public TargetTransformInfoImplBase {
Cost += static_cast<T *>(this)->getArithmeticInstrCost(
Instruction::Add, GEP->getType(), CostKind,
{TTI::OK_AnyValue, TTI::OP_None}, {TTI::OK_AnyValue, TTI::OP_None},
- std::nullopt);
+ {});
} else {
SmallVector<const Value *> Indices(GEP->indices());
Cost += static_cast<T *>(this)->getGEPCost(GEP->getSourceElementType(),
diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
index 2f2a6a09ffc44d..7198e134a2d262 100644
--- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -897,8 +897,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
TTI::OperandValueInfo Opd1Info = {TTI::OK_AnyValue, TTI::OP_None},
TTI::OperandValueInfo Opd2Info = {TTI::OK_AnyValue, TTI::OP_None},
- ArrayRef<const Value *> Args = std::nullopt,
- const Instruction *CxtI = nullptr) {
+ ArrayRef<const Value *> Args = {}, const Instruction *CxtI = nullptr) {
// Check if any of the operands are vector operands.
const TargetLoweringBase *TLI = getTLI();
int ISD = TLI->InstructionOpcodeToISD(Opcode);
@@ -1023,7 +1022,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
ArrayRef<int> Mask,
TTI::TargetCostKind CostKind, int Index,
VectorType *SubTp,
- ArrayRef<const Value *> Args = std::nullopt,
+ ArrayRef<const Value *> Args = {},
const Instruction *CxtI = nullptr) {
switch (improveShuffleKindFromMask(Kind, Mask, Tp, Index, SubTp)) {
case TTI::SK_Broadcast:
@@ -1657,9 +1656,9 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
if (isa<ScalableVectorType>(RetTy))
return BaseT::getIntrinsicInstrCost(ICA, CostKind);
unsigned Index = cast<ConstantInt>(Args[1])->getZExtValue();
- return thisT()->getShuffleCost(
- TTI::SK_ExtractSubvector, cast<VectorType>(Args[0]->getType()),
- std::nullopt, CostKind, Index, cast<VectorType>(RetTy));
+ return thisT()->getShuffleCost(TTI::SK_ExtractSubvector,
+ cast<VectorType>(Args[0]->getType()), {},
+ CostKind, Index, cast<VectorType>(RetTy));
}
case Intrinsic::vector_insert: {
// FIXME: Handle case where a scalable vector is inserted into a scalable
@@ -1668,19 +1667,19 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
return BaseT::getIntrinsicInstrCost(ICA, CostKind);
unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
return thisT()->getShuffleCost(
- TTI::SK_InsertSubvector, cast<VectorType>(Args[0]->getType()),
- std::nullopt, CostKind, Index, cast<VectorType>(Args[1]->getType()));
+ TTI::SK_InsertSubvector, cast<VectorType>(Args[0]->getType()), {},
+ CostKind, Index, cast<VectorType>(Args[1]->getType()));
}
case Intrinsic::vector_reverse: {
- return thisT()->getShuffleCost(
- TTI::SK_Reverse, cast<VectorType>(Args[0]->getType()), std::nullopt,
- CostKind, 0, cast<VectorType>(RetTy));
+ return thisT()->getShuffleCost(TTI::SK_Reverse,
+ cast<VectorType>(Args[0]->getType()), {},
+ CostKind, 0, cast<VectorType>(RetTy));
}
case Intrinsic::vector_splice: {
unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
- return thisT()->getShuffleCost(
- TTI::SK_Splice, cast<VectorType>(Args[0]->getType()), std::nullopt,
- CostKind, Index, cast<VectorType>(RetTy));
+ return thisT()->getShuffleCost(TTI::SK_Splice,
+ cast<VectorType>(Args[0]->getType()), {},
+ CostKind, Index, cast<VectorType>(RetTy));
}
case Intrinsic::vector_reduce_add:
case Intrinsic::vector_reduce_mul:
@@ -2600,9 +2599,8 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
while (NumVecElts > MVTLen) {
NumVecElts /= 2;
VectorType *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
- ShuffleCost +=
- thisT()->getShuffleCost(TTI::SK_ExtractSubvector, Ty, std::nullopt,
- CostKind, NumVecElts, SubTy);
+ ShuffleCost += thisT()->getShuffleCost(TTI::SK_ExtractSubvector, Ty, {},
+ CostKind, NumVecElts, SubTy);
ArithCost += thisT()->getArithmeticInstrCost(Opcode, SubTy, CostKind);
Ty = SubTy;
++LongVectorCount;
@@ -2618,7 +2616,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
// By default reductions need one shuffle per reduction level.
ShuffleCost +=
NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
- std::nullopt, CostKind, 0, Ty);
+ {}, CostKind, 0, Ty);
ArithCost +=
NumReduxLevels * thisT()->getArithmeticInstrCost(Opcode, Ty, CostKind);
return ShuffleCost + ArithCost +
@@ -2691,9 +2689,8 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
NumVecElts /= 2;
auto *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
- ShuffleCost +=
- thisT()->getShuffleCost(TTI::SK_ExtractSubvector, Ty, std::nullopt,
- CostKind, NumVecElts, SubTy);
+ ShuffleCost += thisT()->getShuffleCost(TTI::SK_ExtractSubvector, Ty, {},
+ CostKind, NumVecElts, SubTy);
IntrinsicCostAttributes Attrs(IID, SubTy, {SubTy, SubTy}, FMF);
MinMaxCost += getIntrinsicInstrCost(Attrs, CostKind);
@@ -2709,7 +2706,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
// architecture-dependent length.
ShuffleCost +=
NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
- std::nullopt, CostKind, 0, Ty);
+ {}, CostKind, 0, Ty);
IntrinsicCostAttributes Attrs(IID, Ty, {Ty, Ty}, FMF);
MinMaxCost += NumReduxLevels * getIntrinsicInstrCost(Attrs, CostKind);
// The last min/max should be in vector registers and we counted it above.
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h b/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
index 6f79313c41862e..1f969788d2088e 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
@@ -409,20 +409,21 @@ class CallLowering {
/// \p Handler to move them to the assigned locations.
///
/// \return True if everything has succeeded, false otherwise.
- bool determineAndHandleAssignments(
- ValueHandler &Handler, ValueAssigner &Assigner,
- SmallVectorImpl<ArgInfo> &Args, MachineIRBuilder &MIRBuilder,
- CallingConv::ID CallConv, bool IsVarArg,
- ArrayRef<Register> ThisReturnRegs = std::nullopt) const;
+ bool
+ determineAndHandleAssignments(ValueHandler &Handler, ValueAssigner &Assigner,
+ SmallVectorImpl<ArgInfo> &Args,
+ MachineIRBuilder &MIRBuilder,
+ CallingConv::ID CallConv, bool IsVarArg,
+ ArrayRef<Register> ThisReturnRegs = {}) const;
/// Use \p Handler to insert code to handle the argument/return values
/// represented by \p Args. It's expected determineAssignments previously
/// processed these arguments to populate \p CCState and \p ArgLocs.
- bool
- handleAssignments(ValueHandler &Handler, SmallVectorImpl<ArgInfo> &Args,
- CCState &CCState, SmallVectorImpl<CCValAssign> &ArgLocs,
- MachineIRBuilder &MIRBuilder,
- ArrayRef<Register> ThisReturnRegs = std::nullopt) const;
+ bool handleAssignments(ValueHandler &Handler, SmallVectorImpl<ArgInfo> &Args,
+ CCState &CCState,
+ SmallVectorImpl<CCValAssign> &ArgLocs,
+ MachineIRBuilder &MIRBuilder,
+ ArrayRef<Register> ThisReturnRegs = {}) const;
/// Check whether parameters to a call that are passed in callee saved
/// registers are the same as from the calling function. This needs to be
diff --git a/llvm/include/llvm/CodeGen/LiveRangeEdit.h b/llvm/include/llvm/CodeGen/LiveRangeEdit.h
index 0950c20325fb02..3a4a76d99c5c20 100644
--- a/llvm/include/llvm/CodeGen/LiveRangeEdit.h
+++ b/llvm/include/llvm/CodeGen/LiveRangeEdit.h
@@ -237,7 +237,7 @@ class LiveRangeEdit : private MachineRegisterInfo::Delegate {
/// allocator. These registers should not be split into new intervals
/// as currently those new intervals are not guaranteed to spill.
void eliminateDeadDefs(SmallVectorImpl<MachineInstr *> &Dead,
- ArrayRef<Register> RegsBeingSpilled = std::nullopt);
+ ArrayRef<Register> RegsBeingSpilled = {});
/// calculateRegClassAndHint - Recompute register class and hint for each new
/// register.
diff --git a/llvm/include/llvm/CodeGen/MachineTraceMetrics.h b/llvm/include/llvm/CodeGen/MachineTraceMetrics.h
index a5e78d47724d82..c7d97597d551cd 100644
--- a/llvm/include/llvm/CodeGen/MachineTraceMetrics.h
+++ b/llvm/include/llvm/CodeGen/MachineTraceMetrics.h
@@ -295,9 +295,9 @@ class MachineTraceMetrics : public MachineFunctionPass {
/// classes are included. For the caller to account for extra machine
/// instructions, it must first resolve each instruction's scheduling class.
unsigned getResourceLength(
- ArrayRef<const MachineBasicBlock *> Extrablocks = std::nullopt,
- ArrayRef<const MCSchedClassDesc *> ExtraInstrs = std::nullopt,
- ArrayRef<const MCSchedClassDesc *> RemoveInstrs = std::nullopt) const;
+ ArrayRef<const MachineBasicBlock *> Extrablocks = {},
+ ArrayRef<const MCSchedClassDesc *> ExtraInstrs = {},
+ ArrayRef<const MCSchedClassDesc *> RemoveInstrs = {}) const;
/// Return the length of the (data dependency) critical path through the
/// trace.
diff --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
index a3bfc63f2a4790..c944a96aee61a1 100644
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -2007,7 +2007,7 @@ class TargetInstrInfo : public MCInstrInfo {
/// defined by this method.
virtual ArrayRef<std::pair<int, const char *>>
getSerializableTargetIndices() const {
- return std::nullopt;
+ return {};
}
/// Decompose the machine operand's target flags into two values - the direct
@@ -2024,7 +2024,7 @@ class TargetInstrInfo : public MCInstrInfo {
/// defined by this method.
virtual ArrayRef<std::pair<unsigned, const char *>>
getSerializableDirectMachineOperandTargetFlags() const {
- return std::nullopt;
+ return {};
}
/// Return an array that contains the bitmask target flag values and their
@@ -2034,7 +2034,7 @@ class TargetInstrInfo : public MCInstrInfo {
/// defined by this method.
virtual ArrayRef<std::pair<unsigned, const char *>>
getSerializableBitmaskMachineOperandTargetFlags() const {
- return std::nullopt;
+ return {};
}
/// Return an array that contains the MMO target flag values and their
@@ -2044,7 +2044,7 @@ class TargetInstrInfo : public MCInstrInfo {
/// defined by this method.
virtual ArrayRef<std::pair<MachineMemOperand::Flags, const char *>>
getSerializableMachineMemOperandTargetFlags() const {
- return std::nullopt;
+ return {};
}
/// Determines whether \p Inst is a tail call instruction. Override this
diff --git a/llvm/include/llvm/IR/DIBuilder.h b/llvm/include/llvm/IR/DIBuilder.h
index 97ea38f041baad..a5655f630fc4f0 100644
--- a/llvm/include/llvm/IR/DIBuilder.h
+++ b/llvm/include/llvm/IR/DIBuilder.h
@@ -772,7 +772,7 @@ namespace llvm {
/// Create a new descriptor for the specified
/// variable which has a complex address expression for its address.
/// \param Addr An array of complex address operations.
- DIExpression *createExpression(ArrayRef<uint64_t> Addr = std::nullopt);
+ DIExpression *createExpression(ArrayRef<uint64_t> Addr = {});
/// Create an expression for a variable that does not have an address, but
/// does have a constant value.
diff --git a/llvm/include/llvm/IR/DebugInfoMetadata.h b/llvm/include/llvm/IR/DebugInfoMetadata.h
index e8fdc0bacc6630..d2b4e900438d37 100644
--- a/llvm/include/llvm/IR/DebugInfoMetadata.h
+++ b/llvm/include/llvm/IR/DebugInfoMetadata.h
@@ -138,7 +138,7 @@ class DINode : public MDNode {
protected:
DINode(LLVMContext &C, unsigned ID, StorageType Storage, unsigned Tag,
- ArrayRef<Metadata *> Ops1, ArrayRef<Metadata *> Ops2 = std::nullopt)
+ ArrayRef<Metadata *> Ops1, ArrayRef<Metadata *> Ops2 = {})
: MDNode(C, ID, Storage, Ops1, Ops2) {
assert(Tag < 1u << 16);
SubclassData16 = Tag;
@@ -311,7 +311,7 @@ class DIAssignID : public MDNode {
friend class MDNode;
DIAssignID(LLVMContext &C, StorageType Storage)
- : MDNode(C, DIAssignIDKind, Storage, std::nullopt) {}
+ : MDNode(C, DIAssignIDKind, Storage, {}) {}
~DIAssignID() { dropAllReferences(); }
@@ -2730,7 +2730,7 @@ class DIExpression : public MDNode {
std::vector<uint64_t> Elements;
DIExpression(LLVMContext &C, StorageType Storage, ArrayRef<uint64_t> Elements)
- : MDNode(C, DIExpressionKind, Storage, std::nullopt),
+ : MDNode(C, DIExpressionKind, Storage, {}),
Elements(Elements.begin(), Elements.end()) {}
~DIExpression() = default;
@@ -3776,8 +3776,7 @@ class DIMacroNode : public MDNode {
protected:
DIMacroNode(LLVMContext &C, unsigned ID, StorageType Storage, unsigned MIType,
- ArrayRef<Metadata *> Ops1,
- ArrayRef<Metadata *> Ops2 = std::nullopt)
+ ArrayRef<Metadata *> Ops1, ArrayRef<Metadata *> Ops2 = {})
: MDNode(C, ID, Storage, Ops1, Ops2) {
assert(MIType < 1u << 16);
SubclassData16 = MIType;
diff --git a/llvm/include/llvm/IR/DerivedTypes.h b/llvm/include/llvm/IR/DerivedTypes.h
index d31654ac131d24..975c142f1a4572 100644
--- a/llvm/include/llvm/IR/DerivedTypes.h
+++ b/llvm/include/llvm/IR/DerivedTypes.h
@@ -733,16 +733,16 @@ class TargetExtType : public Type {
/// Return a target extension type having the specified name and optional
/// type and integer parameters.
static TargetExtType *get(LLVMContext &Context, StringRef Name,
- ArrayRef<Type *> Types = std::nullopt,
- ArrayRef<unsigned> Ints = std::nullopt);
+ ArrayRef<Type *> Types = {},
+ ArrayRef<unsigned> Ints = {});
/// Return a target extension type having the specified name and optional
/// type and integer parameters, or an appropriate Error if it fails the
/// parameters check.
- static Expected<TargetExtType *>
- getOrError(LLVMContext &Context, StringRef Name,
- ArrayRef<Type *> Types = std::nullopt,
- ArrayRef<unsigned> Ints = std::nullopt);
+ static Expected<TargetExtType *> getOrError(LLVMContext &Context,
+ StringRef Name,
+ ArrayRef<Type *> Types = {},
+ ArrayRe...
[truncated]
|
jayfoad
changed the title
arsenm
approved these changes
Sep 18, 2024
jayfoad
commented
Sep 18, 2024
| @@ -1450,7 +1450,8 @@ bool AArch64CallLowering::lowerCall(MachineIRBuilder &MIRBuilder, | |||
| if (!determineAndHandleAssignments( | |||
| UsingReturnedArg ? ReturnedArgHandler : Handler, Assigner, InArgs, | |||
| MIRBuilder, Info.CallConv, Info.IsVarArg, | |||
| UsingReturnedArg ? ArrayRef(OutArgs[0].Regs) : std::nullopt)) | |||
| UsingReturnedArg ? ArrayRef(OutArgs[0].Regs) | |||
| : ArrayRef<Register>())) | |||
There was a problem hiding this comment.
Couldn't use {} here due to:
lib/Target/AArch64/GISel/AArch64CallLowering.cpp:1453:58: error: initializer list cannot be used on the right hand side of operator ':'
| @@ -10428,7 +10428,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, | |||
|
|
|||
| SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, | |||
| SDVTList VTList) { | |||
| return getNode(Opcode, DL, VTList, std::nullopt); | |||
| return getNode(Opcode, DL, VTList, ArrayRef<SDValue>()); | |||
There was a problem hiding this comment.
Couldn't use {} here due to ambiguity between:
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, ArrayRef<SDValue> Ops);
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N);
+1 |
Great idea! Thank you for cleaning this up! The use of |
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…lvm#109133) It is almost always simpler to use {} instead of std::nullopt to initialize an empty ArrayRef. This patch changes all occurrences I could find in LLVM itself. In future the ArrayRef(std::nullopt_t) constructor could be deprecated or removed.
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…y ArrayRef Follow up to llvm#109133.
This was referenced Sep 20, 2024
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It is almost always simpler to use {} instead of std::nullopt to
initialize an empty ArrayRef. This patch changes all occurrences I could
find in LLVM itself. In future the ArrayRef(std::nullopt_t) constructor
could be deprecated or removed.