chore: create afs-chips crate
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luffykai
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Avaneesh-axiom
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Avaneesh-axiom
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* chore: add base path for rustdocs assets * chore: trigger workflow for test * fix: relative paths * chore: remove path changer * chore: change head path * chore: remove test workflow trigger
jonathanpwang
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* Update DSL verify to match plonky3 * fix: transpose state for p3-keccak tracegen * chore: add comment linking plonky3 issue * Update stark-backend commit --------- Co-authored-by: Jonathan Wang <[email protected]>
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…ications (#29) * [fix] Fix P256 `GENERATOR` and `double_impl` (#2) * fix p256-generator * add host tests for ecc * Use private repo for stark-backend (#11) * temp(ci): switch riscv AMI for runner (#14) * [chore] Update DSL verify to match plonky3 (#5) * Update DSL verify to match plonky3 * fix: transpose state for p3-keccak tracegen * chore: add comment linking plonky3 issue * Update stark-backend commit --------- Co-authored-by: Jonathan Wang <[email protected]> * Use full commit in openvm-stark-backend revision (#18) * chore: update `stark-backend` commit (#19) * [fix] `Rv32BaseAluAdapterAir` unconstrained register reads (#25) * Create pull_request_template.md (#26) * [fix] Poseidon2 verify_batch opcode can send to execution bus for invalid rows (#17) * [fix] Rust memory allocation overflow (#13) * Fix and add test * Fix lint error * Update crates/toolchain/platform/src/memory.rs --------- Co-authored-by: Jonathan Wang <[email protected]> * [fix] Constrain `final_hash` in sha256 air to address audit finding (#12) * [fix] properly constrain final_hash in sha256 air * Add negative test for underconstrained final_hash. It was manually checked that this new test would have passed before the change. * [fix] IsLtArraySubAir (#9) * add fix * add tests * remove diff_val * chore: update comment * chore: no try_inverse --------- Co-authored-by: Jonathan Wang <[email protected]> * [fix] `Rv32BaseAluAdapterAir` immediate limbs not range-checked (#8) * fix local_as2 * range check imm limbs * add count for range check * add test for unconstrained imm limb * fix MemoryTester chip trace height * add test for unconstrained rs2 read * Revert "fix local_as2" This reverts commit ef83121bf1796874affaca4682dbb4f9f051b079. * Revert "add count for range check" This reverts commit 5252444dfeaf41e7c336648ad92c4736f48ead9d. * Revert "range check imm limbs" This reverts commit 2e2937536069ae66849fdf7bba9ea509065d17fe. * fix unconstrained imm limbs * fix local_rs2_as test * fix lint * Update extensions/rv32im/circuit/src/base_alu/tests.rs --------- Co-authored-by: Jonathan Wang <[email protected]> * fix: fixed SHA2 subair trace generation and the testing (#28) * fix: loadstore sign of immediate (#4) * [fix] Fix P256 `GENERATOR` and `double_impl` (#2) * fix p256-generator * add host tests for ecc * fix: loadstore sign of immediate * fix: prints and test * fix: load_sign_extend tests * Update docs/specs/ISA.md * clarify notation and sign extension in ISA spec * fix reveal transpiler spec --------- Co-authored-by: Manh Dinh <[email protected]> Co-authored-by: Jonathan Wang <[email protected]> * fix transpiler * fix loadstore adapter * fix store transpiler * fix tests * add e2e test * fix docs * fix: jalr imm_sign (#30) * optimize record struct packing * chore: use from_bool * chore: derive_more feature in bench * fix bench * fix --------- Co-authored-by: Xinding Wei <[email protected]> Co-authored-by: Jonathan Wang <[email protected]> Co-authored-by: Golovanov399 <[email protected]> Co-authored-by: Avaneesh-axiom <[email protected]> Co-authored-by: Arayi Khalatyan <[email protected]>
jonathanpwang
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* [fix] Fix P256 `GENERATOR` and `double_impl` (#2) * fix p256-generator * add host tests for ecc * fix: hintstore mem_ptr and rem_words overflow * fix: is_buffer_start constrain * Use private repo for stark-backend (#11) * temp(ci): switch riscv AMI for runner (#14) * [chore] Update DSL verify to match plonky3 (#5) * Update DSL verify to match plonky3 * fix: transpose state for p3-keccak tracegen * chore: add comment linking plonky3 issue * Update stark-backend commit --------- Co-authored-by: Jonathan Wang <[email protected]> * Use full commit in openvm-stark-backend revision (#18) * chore: update `stark-backend` commit (#19) * [fix] `Rv32BaseAluAdapterAir` unconstrained register reads (#25) * Create pull_request_template.md (#26) * [fix] Poseidon2 verify_batch opcode can send to execution bus for invalid rows (#17) * [fix] Rust memory allocation overflow (#13) * Fix and add test * Fix lint error * Update crates/toolchain/platform/src/memory.rs --------- Co-authored-by: Jonathan Wang <[email protected]> * [fix] Constrain `final_hash` in sha256 air to address audit finding (#12) * [fix] properly constrain final_hash in sha256 air * Add negative test for underconstrained final_hash. It was manually checked that this new test would have passed before the change. * [fix] IsLtArraySubAir (#9) * add fix * add tests * remove diff_val * chore: update comment * chore: no try_inverse --------- Co-authored-by: Jonathan Wang <[email protected]> * [fix] `Rv32BaseAluAdapterAir` immediate limbs not range-checked (#8) * fix local_as2 * range check imm limbs * add count for range check * add test for unconstrained imm limb * fix MemoryTester chip trace height * add test for unconstrained rs2 read * Revert "fix local_as2" This reverts commit ef83121bf1796874affaca4682dbb4f9f051b079. * Revert "add count for range check" This reverts commit 5252444dfeaf41e7c336648ad92c4736f48ead9d. * Revert "range check imm limbs" This reverts commit 2e2937536069ae66849fdf7bba9ea509065d17fe. * fix unconstrained imm limbs * fix local_rs2_as test * fix lint * Update extensions/rv32im/circuit/src/base_alu/tests.rs --------- Co-authored-by: Jonathan Wang <[email protected]> * fix: fixed SHA2 subair trace generation and the testing (#28) * fix: loadstore sign of immediate (#4) * [fix] Fix P256 `GENERATOR` and `double_impl` (#2) * fix p256-generator * add host tests for ecc * fix: loadstore sign of immediate * fix: prints and test * fix: load_sign_extend tests * Update docs/specs/ISA.md * clarify notation and sign extension in ISA spec * fix reveal transpiler spec --------- Co-authored-by: Manh Dinh <[email protected]> Co-authored-by: Jonathan Wang <[email protected]> * seperate the fixes * fix naming * fix: lints --------- Co-authored-by: Manh Dinh <[email protected]> Co-authored-by: Xinding Wei <[email protected]> Co-authored-by: Jonathan Wang <[email protected]> Co-authored-by: Golovanov399 <[email protected]> Co-authored-by: Avaneesh-axiom <[email protected]>
jonathanpwang
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Reth-benchmark: https://github.com/axiom-crypto/openvm-reth-benchmark/actions/runs/13730024145 Static verifier performance is back to before #5 Used cells: 57M(before #5) v.s. 62M(after this PR) It seems that the number of columns are same so the actual proof times are close. This actually fixes a soundness issue. `CircuitNum2BitsV` cannot decompose a `Var` into unique limbs.
jonathanpwang
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* Update DSL verify to match plonky3 * fix: transpose state for p3-keccak tracegen * chore: add comment linking plonky3 issue * Update stark-backend commit --------- Co-authored-by: Jonathan Wang <[email protected]>
jonathanpwang
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…ications (#29) * [fix] Fix P256 `GENERATOR` and `double_impl` (#2) * fix p256-generator * add host tests for ecc * Use private repo for stark-backend (#11) * temp(ci): switch riscv AMI for runner (#14) * [chore] Update DSL verify to match plonky3 (#5) * Update DSL verify to match plonky3 * fix: transpose state for p3-keccak tracegen * chore: add comment linking plonky3 issue * Update stark-backend commit --------- Co-authored-by: Jonathan Wang <[email protected]> * Use full commit in openvm-stark-backend revision (#18) * chore: update `stark-backend` commit (#19) * [fix] `Rv32BaseAluAdapterAir` unconstrained register reads (#25) * Create pull_request_template.md (#26) * [fix] Poseidon2 verify_batch opcode can send to execution bus for invalid rows (#17) * [fix] Rust memory allocation overflow (#13) * Fix and add test * Fix lint error * Update crates/toolchain/platform/src/memory.rs --------- Co-authored-by: Jonathan Wang <[email protected]> * [fix] Constrain `final_hash` in sha256 air to address audit finding (#12) * [fix] properly constrain final_hash in sha256 air * Add negative test for underconstrained final_hash. It was manually checked that this new test would have passed before the change. * [fix] IsLtArraySubAir (#9) * add fix * add tests * remove diff_val * chore: update comment * chore: no try_inverse --------- Co-authored-by: Jonathan Wang <[email protected]> * [fix] `Rv32BaseAluAdapterAir` immediate limbs not range-checked (#8) * fix local_as2 * range check imm limbs * add count for range check * add test for unconstrained imm limb * fix MemoryTester chip trace height * add test for unconstrained rs2 read * Revert "fix local_as2" This reverts commit ef83121bf1796874affaca4682dbb4f9f051b079. * Revert "add count for range check" This reverts commit 5252444dfeaf41e7c336648ad92c4736f48ead9d. * Revert "range check imm limbs" This reverts commit 2e2937536069ae66849fdf7bba9ea509065d17fe. * fix unconstrained imm limbs * fix local_rs2_as test * fix lint * Update extensions/rv32im/circuit/src/base_alu/tests.rs --------- Co-authored-by: Jonathan Wang <[email protected]> * fix: fixed SHA2 subair trace generation and the testing (#28) * fix: loadstore sign of immediate (#4) * [fix] Fix P256 `GENERATOR` and `double_impl` (#2) * fix p256-generator * add host tests for ecc * fix: loadstore sign of immediate * fix: prints and test * fix: load_sign_extend tests * Update docs/specs/ISA.md * clarify notation and sign extension in ISA spec * fix reveal transpiler spec --------- Co-authored-by: Manh Dinh <[email protected]> Co-authored-by: Jonathan Wang <[email protected]> * fix transpiler * fix loadstore adapter * fix store transpiler * fix tests * add e2e test * fix docs * fix: jalr imm_sign (#30) * optimize record struct packing * chore: use from_bool * chore: derive_more feature in bench * fix bench * fix --------- Co-authored-by: Xinding Wei <[email protected]> Co-authored-by: Jonathan Wang <[email protected]> Co-authored-by: Golovanov399 <[email protected]> Co-authored-by: Avaneesh-axiom <[email protected]> Co-authored-by: Arayi Khalatyan <[email protected]>
jonathanpwang
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Mar 9, 2025
* [fix] Fix P256 `GENERATOR` and `double_impl` (#2) * fix p256-generator * add host tests for ecc * fix: hintstore mem_ptr and rem_words overflow * fix: is_buffer_start constrain * Use private repo for stark-backend (#11) * temp(ci): switch riscv AMI for runner (#14) * [chore] Update DSL verify to match plonky3 (#5) * Update DSL verify to match plonky3 * fix: transpose state for p3-keccak tracegen * chore: add comment linking plonky3 issue * Update stark-backend commit --------- Co-authored-by: Jonathan Wang <[email protected]> * Use full commit in openvm-stark-backend revision (#18) * chore: update `stark-backend` commit (#19) * [fix] `Rv32BaseAluAdapterAir` unconstrained register reads (#25) * Create pull_request_template.md (#26) * [fix] Poseidon2 verify_batch opcode can send to execution bus for invalid rows (#17) * [fix] Rust memory allocation overflow (#13) * Fix and add test * Fix lint error * Update crates/toolchain/platform/src/memory.rs --------- Co-authored-by: Jonathan Wang <[email protected]> * [fix] Constrain `final_hash` in sha256 air to address audit finding (#12) * [fix] properly constrain final_hash in sha256 air * Add negative test for underconstrained final_hash. It was manually checked that this new test would have passed before the change. * [fix] IsLtArraySubAir (#9) * add fix * add tests * remove diff_val * chore: update comment * chore: no try_inverse --------- Co-authored-by: Jonathan Wang <[email protected]> * [fix] `Rv32BaseAluAdapterAir` immediate limbs not range-checked (#8) * fix local_as2 * range check imm limbs * add count for range check * add test for unconstrained imm limb * fix MemoryTester chip trace height * add test for unconstrained rs2 read * Revert "fix local_as2" This reverts commit ef83121bf1796874affaca4682dbb4f9f051b079. * Revert "add count for range check" This reverts commit 5252444dfeaf41e7c336648ad92c4736f48ead9d. * Revert "range check imm limbs" This reverts commit 2e2937536069ae66849fdf7bba9ea509065d17fe. * fix unconstrained imm limbs * fix local_rs2_as test * fix lint * Update extensions/rv32im/circuit/src/base_alu/tests.rs --------- Co-authored-by: Jonathan Wang <[email protected]> * fix: fixed SHA2 subair trace generation and the testing (#28) * fix: loadstore sign of immediate (#4) * [fix] Fix P256 `GENERATOR` and `double_impl` (#2) * fix p256-generator * add host tests for ecc * fix: loadstore sign of immediate * fix: prints and test * fix: load_sign_extend tests * Update docs/specs/ISA.md * clarify notation and sign extension in ISA spec * fix reveal transpiler spec --------- Co-authored-by: Manh Dinh <[email protected]> Co-authored-by: Jonathan Wang <[email protected]> * seperate the fixes * fix naming * fix: lints --------- Co-authored-by: Manh Dinh <[email protected]> Co-authored-by: Xinding Wei <[email protected]> Co-authored-by: Jonathan Wang <[email protected]> Co-authored-by: Golovanov399 <[email protected]> Co-authored-by: Avaneesh-axiom <[email protected]>
jonathanpwang
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Mar 9, 2025
Reth-benchmark: https://github.com/axiom-crypto/openvm-reth-benchmark/actions/runs/13730024145 Static verifier performance is back to before #5 Used cells: 57M(before #5) v.s. 62M(after this PR) It seems that the number of columns are same so the actual proof times are close. This actually fixes a soundness issue. `CircuitNum2BitsV` cannot decompose a `Var` into unique limbs.
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New crate for chip library.
Added a partially complete range check chip copied from @shuklaayush -- it would be a good integration test of the preprocessed trace to finish the chip completely.