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    70 repositories

    • CF_SRAM_1024x32

      Public
      Verilog
      •
      Apache License 2.0
      •1•0•0•0•Updated Dec 16, 2025Dec 16, 2025

    • caravel_user_project

      Public template
      Verilog
      •
      Apache License 2.0
      •9•10•55•4•Updated Dec 14, 2025Dec 14, 2025

    • mpw_precheck

      Public
      Python
      •
      Apache License 2.0
      •0•2•40•0•Updated Dec 14, 2025Dec 14, 2025

    • ipm

      Public
      Python
      •
      Apache License 2.0
      •3•4•7•1•Updated Dec 10, 2025Dec 10, 2025

    • CF_SRAM_16384x32

      Public
      Commercial 16384x32 SRAM (64KB) - Wishbone compliant memory macro
      Verilog
      •
      Apache License 2.0
      •0•0•0•0•Updated Dec 9, 2025Dec 9, 2025

    • CF_SRAM_8192x32

      Public
      32KB SRAM macro (8192 words × 32 bits) built from 8 × 1024x32 SRAM macros with Wishbone B4 interface
      Verilog
      •
      Apache License 2.0
      •0•0•0•0•Updated Dec 8, 2025Dec 8, 2025

    • nydesign-cc2509

      Public
      Tiny Tapeout SKY 25b shuttle using sky130A PDK on ChipFoundry CC2511 MPW
      Verilog
      •
      Apache License 2.0
      •10•0•0•0•Updated Dec 6, 2025Dec 6, 2025

    • nydesign-ci2511

      Public
      Verilog
      •
      Apache License 2.0
      •0•0•0•0•Updated Dec 6, 2025Dec 6, 2025

    • openlane2

      Public
      The next generation of OpenLane, rewritten from scratch with a modular architecture
      flowasicedaverilogvlsipnrsiliconlvsflowssta
      Python
      •
      Apache License 2.0
      •72•325•90•0•Updated Dec 2, 2025Dec 2, 2025

    • sky130_klayout_pdk

      Public
      Python
      •
      Apache License 2.0
      •2•0•0•0•Updated Nov 22, 2025Nov 22, 2025

    • volare

      Public
      Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs
      pythonversion-managerpdkopenlanepdks
      Python
      •
      Apache License 2.0
      •16•74•6•7•Updated Nov 19, 2025Nov 19, 2025

    • caravel_user_sram

      Public
      Verilog
      •
      Apache License 2.0
      •1•2•0•1•Updated Nov 19, 2025Nov 19, 2025

    • caravel_user_sram_16kb

      Public
      Tcl
      •
      Apache License 2.0
      •0•0•0•1•Updated Nov 19, 2025Nov 19, 2025

    • caravel_user_Neuromorphic_X1_32x32

      Public template
      This project demonstrates the straightforward integration of a commercial Neuromorphic_X1_32x32 within the user_project_wrapper using the IPM (IP Manager) tool.
      Verilog
      •
      Apache License 2.0
      •5•0•0•1•Updated Nov 19, 2025Nov 19, 2025

    • serial_controller_example

      Public
      Verilog
      •
      Apache License 2.0
      •0•2•0•1•Updated Nov 19, 2025Nov 19, 2025

    • caravel_user_project_analog

      Public template
      Verilog
      •
      Apache License 2.0
      •2•0•6•2•Updated Nov 19, 2025Nov 19, 2025

    • openframe_user_project

      Public template
      Verilog
      •
      Apache License 2.0
      •4•4•0•1•Updated Nov 19, 2025Nov 19, 2025

    • nix-eda

      Public
      Nix derivations for EDA tools
      nixedaelectronic-design-automationnix-flake
      Nix
      •
      Apache License 2.0
      •8•11•2•0•Updated Nov 19, 2025Nov 19, 2025

    • openlane-2

      Public
      The continuation of OpenLane 2, maintained under the FOSSi Foundation as "LibreLane." This repository primarily stores tags and and patches specific to ChipFoundry.
      Python
      •
      Apache License 2.0
      •43•0•0•0•Updated Nov 12, 2025Nov 12, 2025

    • chipdiscover-verilog-template

      Public template
      Submission template for Tiny Tapeout SKY130 (ChipFoundry) shuttles - Verilog HDL Projects
      Verilog
      •
      Apache License 2.0
      •147•0•0•0•Updated Nov 11, 2025Nov 11, 2025

    • chipdiscover-wokwi-template

      Public template
      Submission template for Tiny Tapeout SKY130 (ChipFoundry) shuttles - Wokwi Projects
      Verilog
      •
      Apache License 2.0
      •20•0•0•1•Updated Nov 11, 2025Nov 11, 2025

    • tt-gds-action

      Public
      Tiny Tapeout GDS Action (using OpenLane)
      Apache License 2.0
      •22•0•0•0•Updated Nov 11, 2025Nov 11, 2025

    • tt-support-tools

      Public
      tools used by project repos to test configuration, generate OpenLane run summaries and documentation
      Python
      •
      Apache License 2.0
      •23•0•0•0•Updated Nov 11, 2025Nov 11, 2025

    • pwm_example

      Public
      Verilog
      •
      Apache License 2.0
      •1•0•0•0•Updated Nov 3, 2025Nov 3, 2025

    • chipignite-soc-example

      Public
      Verilog
      •
      Apache License 2.0
      •1•0•0•0•Updated Oct 28, 2025Oct 28, 2025

    • caravel-sim-infrastructure

      Public
      HTML
      •
      Apache License 2.0
      •1•0•4•6•Updated Oct 21, 2025Oct 21, 2025

    • CF_TMR32

      Public
      Verilog
      •
      Other
      •1•0•2•5•Updated Oct 20, 2025Oct 20, 2025

    • CF_I2S

      Public
      Verilog
      •
      Other
      •0•0•6•2•Updated Oct 7, 2025Oct 7, 2025

    • CF_I2C

      Public
      Verilog
      •
      Other
      •0•0•6•4•Updated Oct 5, 2025Oct 5, 2025

    • frigate_user_project

      Public template
      Verilog
      •
      Other
      •0•1•0•1•Updated Oct 2, 2025Oct 2, 2025