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2 changes: 1 addition & 1 deletion cirq-core/requirements.txt
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ backports.cached_property~=1.0.1; python_version < '3.8'
duet~=0.2.8
matplotlib~=3.0
networkx>=2.4
numpy>=1.16,<1.24
numpy>=1.16
pandas
sortedcontainers~=2.0
scipy
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5 changes: 3 additions & 2 deletions cirq-ft/cirq_ft/algos/and_gate.ipynb
Original file line number Diff line number Diff line change
Expand Up @@ -111,12 +111,14 @@
"metadata": {},
"outputs": [],
"source": [
"import numpy as np\n",
"\n",
"input_states = [(a, b, 0) for a, b in itertools.product([0, 1], repeat=2)]\n",
"output_states = [(a, b, a & b) for a, b, _ in input_states]\n",
"\n",
"\n",
"for inp, out in zip(input_states, output_states):\n",
" result = cirq.Simulator().simulate(c2, initial_state=inp)\n",
" result = cirq.Simulator(dtype=np.complex128).simulate(c2, initial_state=inp)\n",
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why this change?

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@tanujkhattar tanujkhattar Jun 21, 2023

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Thet test started failing for Windows because of precision issues. I didn't dig very deep on whether it's something related to the new release or whether the test was flaky in the first place (probably more likely) so I just increased the precision and it seems to work fine.

The relevant statements in the cell below, that depend on the precision, are:

    "inds, = np.where(abs(result.final_state_vector) > 1e-8)\n",
    "assert len(inds) == 1\n",

" print(inp, '->', result.dirac_notation())\n",
" assert result.dirac_notation()[1:-1] == \"\".join(str(x) for x in out)"
]
Expand All @@ -128,7 +130,6 @@
"metadata": {},
"outputs": [],
"source": [
"import numpy as np\n",
"inds, = np.where(abs(result.final_state_vector) > 1e-8)\n",
"assert len(inds) == 1\n",
"ind, = inds\n",
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2 changes: 1 addition & 1 deletion cirq-ft/cirq_ft/algos/and_gate_test.py
Original file line number Diff line number Diff line change
Expand Up @@ -55,7 +55,7 @@ def test_multi_controlled_and_gate(cv: List[int]):

for input_control in input_controls:
initial_state = input_control + [0] * (r['ancilla'].bitsize + 1)
result = cirq.Simulator().simulate(
result = cirq.Simulator(dtype=np.complex128).simulate(
circuit, initial_state=initial_state, qubit_order=qubit_order
)
expected_output = np.asarray([0, 1] if input_control == cv else [1, 0])
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