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Jan 24, 2022
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Add preliminary support for inline assembly for msp430. #93219

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3 changes: 3 additions & 0 deletions compiler/rustc_codegen_gcc/src/asm.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -560,6 +560,7 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => unimplemented!(),
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => unimplemented!(),
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => unimplemented!(),
InlineAsmRegClass::Msp430(_) => unimplemented!(),
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => unimplemented!(),
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => unimplemented!(),
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => unimplemented!(),
Expand Down Expand Up @@ -622,6 +623,7 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => cx.type_i32(),
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => cx.type_i32(),
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => cx.type_f32(),
InlineAsmRegClass::Msp430(_) => unimplemented!(),
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => cx.type_i16(),
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => cx.type_i32(),
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => cx.type_i64(),
Expand Down Expand Up @@ -729,6 +731,7 @@ fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option
InlineAsmRegClass::Bpf(_) => unimplemented!(),
InlineAsmRegClass::Hexagon(_) => unimplemented!(),
InlineAsmRegClass::Mips(_) => unimplemented!(),
InlineAsmRegClass::Msp430(_) => unimplemented!(),
InlineAsmRegClass::Nvptx(_) => unimplemented!(),
InlineAsmRegClass::PowerPC(_) => unimplemented!(),
InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg)
Expand Down
6 changes: 6 additions & 0 deletions compiler/rustc_codegen_llvm/src/asm.rs
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Expand Up @@ -232,6 +232,9 @@ impl<'ll, 'tcx> AsmBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
InlineAsmArch::SpirV => {}
InlineAsmArch::Wasm32 | InlineAsmArch::Wasm64 => {}
InlineAsmArch::Bpf => {}
InlineAsmArch::Msp430 => {
constraints.push("~{sr}".to_string());
}
}
}
if !options.contains(InlineAsmOptions::NOMEM) {
Expand Down Expand Up @@ -580,6 +583,7 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'_>>) ->
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => "e",
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => "r",
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
bug!("LLVM backend does not support SPIR-V")
}
Expand Down Expand Up @@ -666,6 +670,7 @@ fn modifier_to_llvm(
},
InlineAsmRegClass::Avr(_) => None,
InlineAsmRegClass::S390x(_) => None,
InlineAsmRegClass::Msp430(_) => None,
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
bug!("LLVM backend does not support SPIR-V")
}
Expand Down Expand Up @@ -734,6 +739,7 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &'
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => cx.type_i16(),
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => cx.type_i32(),
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => cx.type_f64(),
InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => cx.type_i16(),
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
bug!("LLVM backend does not support SPIR-V")
}
Expand Down
25 changes: 25 additions & 0 deletions compiler/rustc_target/src/asm/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -152,6 +152,7 @@ mod avr;
mod bpf;
mod hexagon;
mod mips;
mod msp430;
mod nvptx;
mod powerpc;
mod riscv;
Expand All @@ -166,6 +167,7 @@ pub use avr::{AvrInlineAsmReg, AvrInlineAsmRegClass};
pub use bpf::{BpfInlineAsmReg, BpfInlineAsmRegClass};
pub use hexagon::{HexagonInlineAsmReg, HexagonInlineAsmRegClass};
pub use mips::{MipsInlineAsmReg, MipsInlineAsmRegClass};
pub use msp430::{Msp430InlineAsmReg, Msp430InlineAsmRegClass};
pub use nvptx::{NvptxInlineAsmReg, NvptxInlineAsmRegClass};
pub use powerpc::{PowerPCInlineAsmReg, PowerPCInlineAsmRegClass};
pub use riscv::{RiscVInlineAsmReg, RiscVInlineAsmRegClass};
Expand Down Expand Up @@ -194,6 +196,7 @@ pub enum InlineAsmArch {
Wasm64,
Bpf,
Avr,
Msp430,
}

impl FromStr for InlineAsmArch {
Expand All @@ -219,6 +222,7 @@ impl FromStr for InlineAsmArch {
"wasm64" => Ok(Self::Wasm64),
"bpf" => Ok(Self::Bpf),
"avr" => Ok(Self::Avr),
"msp430" => Ok(Self::Msp430),
_ => Err(()),
}
}
Expand Down Expand Up @@ -250,6 +254,7 @@ pub enum InlineAsmReg {
Wasm(WasmInlineAsmReg),
Bpf(BpfInlineAsmReg),
Avr(AvrInlineAsmReg),
Msp430(Msp430InlineAsmReg),
// Placeholder for invalid register constraints for the current target
Err,
}
Expand All @@ -267,6 +272,7 @@ impl InlineAsmReg {
Self::S390x(r) => r.name(),
Self::Bpf(r) => r.name(),
Self::Avr(r) => r.name(),
Self::Msp430(r) => r.name(),
Self::Err => "<reg>",
}
}
Expand All @@ -283,6 +289,7 @@ impl InlineAsmReg {
Self::S390x(r) => InlineAsmRegClass::S390x(r.reg_class()),
Self::Bpf(r) => InlineAsmRegClass::Bpf(r.reg_class()),
Self::Avr(r) => InlineAsmRegClass::Avr(r.reg_class()),
Self::Msp430(r) => InlineAsmRegClass::Msp430(r.reg_class()),
Self::Err => InlineAsmRegClass::Err,
}
}
Expand Down Expand Up @@ -336,6 +343,9 @@ impl InlineAsmReg {
InlineAsmArch::Avr => {
Self::Avr(AvrInlineAsmReg::parse(arch, target_features, target, name)?)
}
InlineAsmArch::Msp430 => {
Self::Msp430(Msp430InlineAsmReg::parse(arch, target_features, target, name)?)
}
})
}

Expand All @@ -358,6 +368,7 @@ impl InlineAsmReg {
Self::S390x(r) => r.emit(out, arch, modifier),
Self::Bpf(r) => r.emit(out, arch, modifier),
Self::Avr(r) => r.emit(out, arch, modifier),
Self::Msp430(r) => r.emit(out, arch, modifier),
Self::Err => unreachable!("Use of InlineAsmReg::Err"),
}
}
Expand All @@ -374,6 +385,7 @@ impl InlineAsmReg {
Self::S390x(_) => cb(self),
Self::Bpf(r) => r.overlapping_regs(|r| cb(Self::Bpf(r))),
Self::Avr(r) => r.overlapping_regs(|r| cb(Self::Avr(r))),
Self::Msp430(_) => cb(self),
Self::Err => unreachable!("Use of InlineAsmReg::Err"),
}
}
Expand Down Expand Up @@ -405,6 +417,7 @@ pub enum InlineAsmRegClass {
Wasm(WasmInlineAsmRegClass),
Bpf(BpfInlineAsmRegClass),
Avr(AvrInlineAsmRegClass),
Msp430(Msp430InlineAsmRegClass),
// Placeholder for invalid register constraints for the current target
Err,
}
Expand All @@ -425,6 +438,7 @@ impl InlineAsmRegClass {
Self::Wasm(r) => r.name(),
Self::Bpf(r) => r.name(),
Self::Avr(r) => r.name(),
Self::Msp430(r) => r.name(),
Self::Err => rustc_span::symbol::sym::reg,
}
}
Expand All @@ -447,6 +461,7 @@ impl InlineAsmRegClass {
Self::Wasm(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Wasm),
Self::Bpf(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Bpf),
Self::Avr(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Avr),
Self::Msp430(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Msp430),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
Expand Down Expand Up @@ -476,6 +491,7 @@ impl InlineAsmRegClass {
Self::Wasm(r) => r.suggest_modifier(arch, ty),
Self::Bpf(r) => r.suggest_modifier(arch, ty),
Self::Avr(r) => r.suggest_modifier(arch, ty),
Self::Msp430(r) => r.suggest_modifier(arch, ty),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
Expand All @@ -501,6 +517,7 @@ impl InlineAsmRegClass {
Self::Wasm(r) => r.default_modifier(arch),
Self::Bpf(r) => r.default_modifier(arch),
Self::Avr(r) => r.default_modifier(arch),
Self::Msp430(r) => r.default_modifier(arch),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
Expand All @@ -525,6 +542,7 @@ impl InlineAsmRegClass {
Self::Wasm(r) => r.supported_types(arch),
Self::Bpf(r) => r.supported_types(arch),
Self::Avr(r) => r.supported_types(arch),
Self::Msp430(r) => r.supported_types(arch),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
Expand Down Expand Up @@ -554,6 +572,7 @@ impl InlineAsmRegClass {
}
InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmRegClass::parse(arch, name)?),
InlineAsmArch::Avr => Self::Avr(AvrInlineAsmRegClass::parse(arch, name)?),
InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmRegClass::parse(arch, name)?),
})
}

Expand All @@ -574,6 +593,7 @@ impl InlineAsmRegClass {
Self::Wasm(r) => r.valid_modifiers(arch),
Self::Bpf(r) => r.valid_modifiers(arch),
Self::Avr(r) => r.valid_modifiers(arch),
Self::Msp430(r) => r.valid_modifiers(arch),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
Expand Down Expand Up @@ -764,6 +784,11 @@ pub fn allocatable_registers(
avr::fill_reg_map(arch, target_features, target, &mut map);
map
}
InlineAsmArch::Msp430 => {
let mut map = msp430::regclass_map();
msp430::fill_reg_map(arch, target_features, target, &mut map);
map
}
}
}

Expand Down
81 changes: 81 additions & 0 deletions compiler/rustc_target/src/asm/msp430.rs
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@@ -0,0 +1,81 @@
use super::{InlineAsmArch, InlineAsmType};
use rustc_macros::HashStable_Generic;
use rustc_span::Symbol;
use std::fmt;

def_reg_class! {
Msp430 Msp430InlineAsmRegClass {
reg,
}
}

impl Msp430InlineAsmRegClass {
pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] {
&[]
}

pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
None
}

pub fn suggest_modifier(
self,
_arch: InlineAsmArch,
_ty: InlineAsmType,
) -> Option<(char, &'static str)> {
None
}

pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<(char, &'static str)> {
None
}

pub fn supported_types(
self,
arch: InlineAsmArch,
) -> &'static [(InlineAsmType, Option<Symbol>)] {
match (self, arch) {
(Self::reg, _) => types! { _: I8, I16; },
}
}
}

// The reserved registers are taken from:
// https://github.com/llvm/llvm-project/blob/36cb29cbbe1b22dcd298ad65e1fabe899b7d7249/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp#L73.
def_regs! {
Msp430 Msp430InlineAsmReg Msp430InlineAsmRegClass {
r5: reg = ["r5"],
r6: reg = ["r6"],
r7: reg = ["r7"],
r8: reg = ["r8"],
r9: reg = ["r9"],
r10: reg = ["r10"],
r11: reg = ["r11"],
r12: reg = ["r12"],
r13: reg = ["r13"],
r14: reg = ["r14"],
r15: reg = ["r15"],

#error = ["r0", "pc"] =>
"the program counter cannot be used as an operand for inline asm",
#error = ["r1", "sp"] =>
"the stack pointer cannot be used as an operand for inline asm",
#error = ["r2", "sr"] =>
"the status register cannot be used as an operand for inline asm",
#error = ["r3", "cg"] =>
"the constant generator cannot be used as an operand for inline asm",
#error = ["r4", "fp"] =>
"the frame pointer cannot be used as an operand for inline asm",
}
}

impl Msp430InlineAsmReg {
pub fn emit(
self,
out: &mut dyn fmt::Write,
_arch: InlineAsmArch,
_modifier: Option<char>,
) -> fmt::Result {
out.write_str(self.name())
}
}
17 changes: 16 additions & 1 deletion src/doc/unstable-book/src/language-features/asm-experimental-arch.md
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Expand Up @@ -15,6 +15,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
- BPF
- SPIR-V
- AVR
- MSP430

## Register classes

Expand All @@ -39,6 +40,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
| AVR | `reg_pair` | `r3r2` .. `r25r24`, `X`, `Z` | `r` |
| AVR | `reg_iw` | `r25r24`, `X`, `Z` | `w` |
| AVR | `reg_ptr` | `X`, `Z` | `e` |
| MSP430 | `reg` | `r[0-15]` | `r` |

> **Notes**:
> - NVPTX doesn't have a fixed register set, so named registers are not supported.
Expand Down Expand Up @@ -67,6 +69,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
| BPF | `wreg` | `alu32` | `i8` `i16` `i32` |
| AVR | `reg`, `reg_upper` | None | `i8` |
| AVR | `reg_pair`, `reg_iw`, `reg_ptr` | None | `i16` |
| MSP430 | `reg` | None | `i8`, `i16` |

## Register aliases

Expand All @@ -80,13 +83,22 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
| AVR | `XL` | `r26` |
| AVR | `ZH` | `r31` |
| AVR | `ZL` | `r30` |
| MSP430 | `r0` | `pc` |
| MSP430 | `r1` | `sp` |
| MSP430 | `r2` | `sr` |
| MSP430 | `r3` | `cg` |
| MSP430 | `r4` | `fp` |

> **Notes**:
> - TI does not mandate a frame pointer for MSP430, but toolchains are allowed
to use one; LLVM uses `r4`.

## Unsupported registers

| Architecture | Unsupported register | Reason |
| ------------ | --------------------------------------- | ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
| All | `sp` | The stack pointer must be restored to its original value at the end of an asm code block. |
| All | `fr` (Hexagon), `$fp` (MIPS), `Y` (AVR) | The frame pointer cannot be used as an input or output. |
| All | `fr` (Hexagon), `$fp` (MIPS), `Y` (AVR), `r4` (MSP430) | The frame pointer cannot be used as an input or output. |
| All | `r19` (Hexagon) | This is used internally by LLVM as a "base pointer" for functions with complex stack frames. |
| MIPS | `$0` or `$zero` | This is a constant zero register which can't be modified. |
| MIPS | `$1` or `$at` | Reserved for assembler. |
Expand All @@ -95,6 +107,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
| MIPS | `$ra` | Return address cannot be used as inputs or outputs. |
| Hexagon | `lr` | This is the link register which cannot be used as an input or output. |
| AVR | `r0`, `r1`, `r1r0` | Due to an issue in LLVM, the `r0` and `r1` registers cannot be used as inputs or outputs. If modified, they must be restored to their original values before the end of the block. |
|MSP430 | `r0`, `r2`, `r3` | These are the program counter, status register, and constant generator respectively. Neither the status register nor constant generator can be written to. |

## Template modifiers

Expand All @@ -115,3 +128,5 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
These flags registers must be restored upon exiting the asm block if the `preserves_flags` option is set:
- AVR
- The status register `SREG`.
- MSP430
- The status register `r2`.
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