Skip to content

RISC-V tests in QEMU #765

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Closed
wants to merge 2 commits into from
Closed

RISC-V tests in QEMU #765

wants to merge 2 commits into from

Conversation

aykevl
Copy link
Member

@aykevl aykevl commented Nov 30, 2019

Not everything is supported right now, but these tests should make sure that things that work now won't break in the future.

@aykevl aykevl force-pushed the riscv-tests branch 3 times, most recently from fc42024 to ad87621 Compare November 30, 2019 13:08
@aykevl aykevl force-pushed the riscv-tests branch 4 times, most recently from f44dc54 to 143bcbf Compare December 12, 2019 01:16
@deadprogram
Copy link
Member

@aykevl perhaps if you rebase against dev this PR might pass the Azure build?

@aykevl
Copy link
Member Author

aykevl commented Dec 18, 2019

Doubt it, it'll need the SiFive version of QEMU.

@aykevl aykevl force-pushed the riscv-tests branch 5 times, most recently from 4e5a2ae to c2d5b02 Compare December 26, 2019 23:29
@aykevl aykevl changed the title WIP: RISC-V tests in QEMU RISC-V tests in QEMU Dec 26, 2019
@aykevl aykevl marked this pull request as ready for review December 26, 2019 23:59
@aykevl
Copy link
Member Author

aykevl commented Dec 27, 2019

Okay, this is ready for review (but not for merge).

I've used a few dirty hacks to get this to work and it doesn't quite work yet on Windows for reasons I can't explain but at least this shows where I'm going.

I think the crude hacks could be avoided by using the virt machine for RISC-V instead of sifive_e. That target isn't as close to the HiFive1 as sifive_e, but it looks like it has a mechanism for exiting tests (the so-called SiFive Test Finisher). Any opinion on this? Rather have dirty hacks or a test that looks less like the real hardware?

Note: the SiFive test finisher is included in the SiFive build of QEMU but somehow didn't end up upstream. Unfortunately, using their version would slow down CI significantly.

main_test.go Outdated
@@ -55,6 +55,12 @@ func TestCompiler(t *testing.T) {
runPlatTests("cortex-m-qemu", matches, t)
})

if runtime.GOOS != "linux" {
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Does this also need to exclude freebsd?

Copy link
Member Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Heh, good point. I'll simply check for windows or darwin instead, to be conservative.

@aykevl aykevl force-pushed the riscv-tests branch 2 times, most recently from 205c914 to 73bbf63 Compare January 5, 2020 11:52
This commit makes the following command work correctly:

    tinygo run -target=hifive1-qemu ./testdata/cgo/
These tests should make sure that things that work now won't break in
the future.
@deadprogram
Copy link
Member

What is the state of this branch? It has a merge conflict that needs to be resolved, but otherwise what is needed for it to be merged?

@aykevl
Copy link
Member Author

aykevl commented Mar 22, 2020

Right now it has a hack to work around the lack of exiting from within QEMU. I think I should add a new virt RISC-V target to fix that.

@aykevl
Copy link
Member Author

aykevl commented Mar 22, 2020

Investigating this it seems like the first commit will be obsoleted by #871. It would be convenient if that PR was merged first.

@aykevl
Copy link
Member Author

aykevl commented Mar 22, 2020

Replaced in favor of #976.

@aykevl aykevl closed this Mar 22, 2020
@deadprogram deadprogram deleted the riscv-tests branch December 28, 2020 09:11
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants