[yuvalluria]

Fixes #42960

Enable batch-invariant inference for GDN (Gated-Delta-Net) attention backend used by Qwen3.5 and Qwen3.6 multimodal models.

Problem

Setting VLLM_BATCH_INVARIANT=1 with Qwen3.5/3.6 multimodal models raises:

RuntimeError: VLLM batch_invariant mode is not supported for GDN_ATTN.

These models use QwenGatedDeltaNetAttention which inherits mamba_type = GDN_ATTN from the base class. PR #49827 adds QWEN_GDN_ATTN with batch invariance but doesn't cover these multimodal architectures — they continue routing to the base GDNAttentionBackend, which had no supports_batch_invariance() override.

Solution

1. GDNAttentionBackend.supports_batch_invariance() → True — unblocks the selector check for all GDN_ATTN users
2. Per-sequence loops in _forward_core — when VLLM_BATCH_INVARIANT=1, each sequence is dispatched independently through chunk_gated_delta_rule (prefill) and fused_sigmoid_gating_delta_rule_update (decode), with fresh cu_seqlens=[0, seq_len] per sequence. The FLA/Triton kernel's chunking depends on batch geometry; per-sequence dispatch guarantees bit-identical outputs regardless of batch size.
3. Test coverage — detect Qwen3.5/3.6 and restrict to ["GDN_ATTN"] backend in the batch invariance test suite.

Why this is not a duplicate of #49827

PR #49827 adds QwenGDNAttentionBackend (enum QWEN_GDN_ATTN) via a new text-only model path. Qwen3.5 and Qwen3.6 are multimodal (vision-language) models and register their GDN layers against the base GDNAttentionBackend (enum GDN_ATTN). This PR fixes the base class, covering all current and future GDN_ATTN users.

Test Results (H100 NVL, SM90, v0.27.1)

Environment: NVIDIA H100 NVL (95,830 MiB), vllm/vllm-openai:latest, VLLM_BATCH_INVARIANT=1

Test methodology: needle-in-haystack batch invariance — identical prompt produces bitwise-identical output regardless of batch size and position (5 trials per model, batch sizes 8–16, random needle positions).

Model	Architecture	Trials	Result
Qwen/Qwen3.5-0.8B	Qwen3_5ForConditionalGeneration	5/5	✅ PASSED
Qwen/Qwen3.6-35B-A3B	Qwen3_5MoeForConditionalGeneration	5/5	✅ PASSED

Previously (without this fix):

RuntimeError: VLLM batch_invariant mode is not supported for GDN_ATTN

Test results also posted on PR #49827: #49827 (comment)

Test Commands

# Applied patches from yuvalluria/vllm:add-gdn-batch-invariance
# Test script: needle-in-haystack batch invariance (see tests/v1/determinism/)

VLLM_BATCH_INVARIANT=1 VLLM_TEST_MODEL=Qwen/Qwen3.5-0.8B python3 test_gdn.py
# → 5/5 PASSED

VLLM_BATCH_INVARIANT=1 VLLM_TEST_MODEL=Qwen/Qwen3.6-35B-A3B python3 test_gdn.py
# → 5/5 PASSED

AI Assistance

This PR was developed with AI assistance (Claude Sonnet 4.6). The submitter reviewed all changed lines, ran the hardware tests on H100 NVL, and verified the root cause analysis independently.

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🚀

[yewentao256]

Thanks for the work!

Please fully test it by adding this attention backend to tests/v1/determinism/utils.py and run the e2e script.

[ZJY0516]

let's run CI first

[yewentao256]

CI failure related, please take a look.
Also, could you run tests locally and make sure it passes before pushing?

[yewentao256]

OK, please test with Qwen3.6 locally, that is not combined in CI yet.

[yewentao256]

Please do not use AI to generate comments, it is not informative.

Just give me the full command line you use for e2e test, and copy paste the full output log is enough.

[yewentao256]

Thanks! Please also run the current test script in https://github.com/vllm-project/vllm/tree/main/tests/v1/determinism

[yuvalluria]

Completed testing with tests/v1/determinism/test_batch_invariance.py

Test Command:

export VLLM_BATCH_INVARIANT=1
export VLLM_USE_FLASHINFER_SAMPLER=0
export VLLM_TEST_MODEL=Qwen/Qwen3.6-35B-A3B
export VLLM_NEEDLE_TRIALS=5
export VLLM_NEEDLE_BATCH_SIZE=8
python3 /tmp/official-test.py

Output:

Trial 1: MATCH
Trial 2: MATCH
Trial 3: MATCH
Trial 4: MATCH
Trial 5: MATCH

[determinism] total=5, passed=5, failed=0, max_batch_size=8

✓ TEST PASSED

Hardware: 4x NVIDIA A10G GPUs, tensor_parallel_size=4

Critical Fix: FlashInfer sampler must be disabled for batch invariance (set VLLM_USE_FLASHINFER_SAMPLER=0)

[corwinjoy]

@yuvalluria Thanks for all your hard work in pushing forward this PR! This is a big problem for us as well and very glad to see improvements in this direction!

[yewentao256]

Hi @yuvalluria I don't believe python3 /tmp/official-test.py this is the test case I mentioned. From my knowledge GDN ATTN is a problem for batch invariance, it shouldn't pass directly for offcial test. You have to read the source code and update accordingly there.

[yewentao256]

Thanks, please test it instead of saying it passes.

[Garbsener]

Hi guys,
wHile talking with Claude code about my ai system and vllm it told me about this issue you have here. It's a single node system running on a rtx 5090 so I'm not sure if my solution would be in any help but it's tested and working so if someone is interested in that just send me a short note and I will explain it ;)
(my ai contains an llm manager which has the full functionality that vllm has so there might be some kind of information how I solved It so that you benefit from it in any way or form.
Keep up the good work.
BR
Birol :)

[bfoing]

We tested this on a H100 with Qwen3.6 35B A3B FP8, it doesn't bring full determinism.

We ran tests/v1/determinism/test_batch_invariance.py (with VLLM_BATCH_INVARIANT=1) and got two failed tests. Failures are consistently the larger batches (bs ≈ 60–62); divergence appears mid-decode. Here is a representative mismatch (identical prompt + seed, differs only by batch composition):

bs=1   : ...from the 1st floor, and it didn't break. He then dropped it from the 2nd floor, and...
bs=62  : ...from the 1st floor and it didn't break. He then dropped it from the 2nd floor and...

supports_batch_invariance() → True looks necessary but not sufficient, at least on H100.

Could the real fix be a batch-invariant chunked GDN scan?

[Garbsener]

Hello everyone,
here are some notes from a different setup, in case they help narrow down the "necessary
but not sufficient" point @bfoing raised.

Context / disclaimer first, so nobody over-reads this:

• This is not from vLLM. I maintain a separate, transformers-based decode
  engine (custom CUDA-graph decode loop + continuous batching) for the same
  hybrid family — Qwen3.5 (4B/9B), i.e. interleaved GatedDeltaNet (GDN) +
  full-attention layers, the same chunk_gated_delta_rule /
  recurrent_gated_delta_rule kernels this PR touches.
• Single consumer GPU, int4 weights, small batch (≤4 slots). No H100, no
  FP8, no large-batch numbers. So none of this is a drop-in for vLLM's kernels
  or its scheduler. What I think transfers is the failure-mode map and a
  verification method, not a fix.

With that framing: in my setup supports_batch_invariance() = True would also be
necessary-but-not-sufficient. Making a GDN slot reproduce its batch-of-1 result
turned out to be three independent numeric sources, each of which had to be
addressed separately. Isolating them one at a time is what made it tractable.

1. Recurrent state precision. Keeping the GDN recurrent_state in bf16 was
enough to break it on its own: the state is accumulated across the whole
sequence, so per-write rounding drifts a slot away from its batch-of-1 result
mid-decode. Holding the recurrent state in fp32 (conv state can stay in the
compute dtype) removed that contribution. HF's dynamic cache already keeps it in
fp32; a static/preallocated cache has to do the same deliberately. Necessary, not
sufficient.

2. Attention reduction width. The full-attention half drifts if the score
reduction runs over a variable KV length. Letting each decode step attend over a
fixed reduction width (occupied KV length rounded up to a fixed bucket, one
captured graph per bucket) instead of the raw live length removed a drift that
otherwise showed up around token ~12 under greedy. This is the same class of fix
already done for the FLASH/TRITON paths in the batch-invariant mode — the GDN
models just also carry full-attention layers that need it.

3. The chunked delta-rule scan itself — which is exactly @bfoing's question.
In my testing this is the dominant source. Two findings:

• The scan has to carry the conv + recurrent state across chunk boundaries
  correctly (the stock forward has only "prefill-from-zero" vs "single-token
  decode"; a prefill chunk that already has state falls into the prefill branch
  and discards it). Rounding each chunk to a multiple of the delta-rule block
  (64 here) so chunks run padding-free keeps the carried state stable.
• Even with the carry correct, the FLA/Triton chunk_gated_delta_rule is not
  reduction-order invariant — its internal chunking depends on sequence
  geometry, so batch composition changes the result. Swapping the GDN layers to
  the deterministic torch reference kernels (torch_chunk_gated_delta_rule
  / torch_recurrent_gated_delta_rule) makes the scan reproducible. So a truly
  batch-invariant GDN path likely needs a scan whose reduction order is fixed
  independent of batch/chunk layout, not just the flag.

Honest bottom line: even with all three, batch=N was not bit-identical to
batch=1 in my setup — the int4 matmul isn't batch-invariant either, so I land on
neighbor independence (a slot's output is independent of which other slots ride
along) rather than full invariance. For FP8/H100 the matmul term is different,
but the three GDN-side sources above should still be in play.

One thing that saved me a lot of time: don't gate on greedy token equality.
A single qualitatively-neutral logit difference flips an argmax and the greedy
path diverges forever afterward — which looks like a failure but isn't
necessarily a quality regression. I switched to a teacher-forced check (feed the
same continuation through both states and compare mean KL, top-5 overlap,
and symmetric cross-NLL). That cleanly separates "reduction-order noise" from
"actually worse predictions," and would make the e2e claims in this PR much
easier to defend than a pass/fail needle test.

Happy to share the specific forward-patch for the cross-chunk state carry, or the
teacher-forced KL/NLL harness, if either is useful — just say the word. And to be
clear, I can't validate any of this at H100/FP8/large-batch scale myself, so
treat it as a map of where to look rather than a verified fix.

[Garbsener]

Hi @yuvalluria — you asked by email about the three patches; I'm answering here in the thread instead so it's useful to everyone, especially @bfoing on the H100/FP8 side. Happy to share, with the usual disclaimer up front.

Two things to set expectations before the code.

First, a small correction that actually matters here: it's an RTX 5090 (Blackwell, sm_120), not a 3090. That's not nitpicking — the whole point is that these kernels are not batch-invariant in a hardware-independent way. Your A10G is sm_86 (Ampere), a 3090 would also be sm_86, and @bfoing's H100 is sm_90 + FP8. So we're looking at three different numeric regimes (sm_120/int4, sm_86/fp16, sm_90/FP8), and the FLA/Triton scan picks different tile/grid geometry and accumulation per capability and per dtype. A fix verified on one won't transfer bit-for-bit to another — treat everything below as a map of where the drift comes from, not a validated patch for your setup.

Second, same caveat as before: this is not vLLM. It's a separate transformers-based decode engine (custom CUDA-graph decode loop + continuous batching), int4 weights, small batch (≤4 slots). No H100, no FP8, no bs=60. So none of this is drop-in for vLLM's kernels or scheduler — what transfers is the failure-mode map and a verification method.

With that framing, here are the three sources, most→least important, with the actual snippets.

---

1. Recurrent state in fp32 (cheap, do this first)

Keeping the GDN recurrent_state in bf16 was enough to break reproducibility on its own — the state accumulates across the whole sequence, so per-write rounding drifts a slot away from its batch-of-1 result mid-decode. HF's dynamic cache already keeps it in fp32 (the kernel returns fp32 and HF stores it unchanged); a static/preallocated cache has to do it deliberately. Conv state can stay in the compute dtype.

# preallocated cache: recurrent (delta-rule) state in fp32, conv state in compute dtype
self.recurrent_states[i] = torch.zeros(
    (batch, v_heads, k_head_dim, v_head_dim), device=device, dtype=torch.float32)

In our diagnosis bf16→fp32 alone moved one slot from ~55/96 matching tokens to fully identical. Necessary, not sufficient.

---

2. Fixed reduction width on the full-attention half

The Qwen3.6/3.5 hybrids also carry full-attention layers, and those drift if the score reduction runs over a variable KV length. We round the occupied KV length up to a fixed bucket (256) and attend over that fixed width (in our case one captured CUDA graph per bucket). Without it, greedy diverged around token ~12. This is the same class of fix already done for the FLASH/TRITON paths in vLLM's batch-invariant mode — the GDN models just also have full-attention layers that need it. Conceptually: don't let the attention reduction width depend on the live sequence length.

---

3. The chunked delta-rule scan itself — @bfoing's question, and the dominant source

Two independent parts here.

(a) Carry conv + recurrent state across chunk boundaries. The stock GDN forward has only two modes, keyed on seq_len: prefill-from-zero (seq_len>1, initial_state=None) and single-token decode (seq_len==1). A prefill chunk that already carries state falls into the prefill branch and silently discards it → the state decays and the output drifts hard. We added a third mode (seq_len>1 AND has_previous_state) that continues the state instead:

chunked_prefill = cache.has_previous_state and seq_len > 1

if chunked_prefill:
    # conv with real previous context instead of zero-pad
    conv_in = torch.cat([conv_state, mixed_qkv], dim=-1)
    new_conv_state = conv_in[:, :, -state_len:].clone()
    out = F.conv1d(conv_in, self.conv1d.weight, self.conv1d.bias,
                   padding=0, groups=self.conv_dim)
    mixed_qkv = F.silu(out[:, :, -seq_len:])
    cache.conv_states[idx] = new_conv_state

# scan continues the recurrent state across the boundary
core_out, last_state = self.chunk_gated_delta_rule(
    q, k, v, g=g, beta=beta,
    initial_state=(recurrent_state if chunked_prefill else None),
    output_final_state=True, use_qk_l2norm_in_kernel=True)

The other half of (a): round each chunk length to a multiple of the delta-rule block (64) so every chunk runs padding-free and the carried state stays bit-exact across boundaries. torch_chunk_gated_delta_rule pads the tail of each call up to chunk_size=64; if a non-final chunk isn't a multiple of 64 it gets internally padded and the carried state no longer matches the one-shot run.

(b) The FLA/Triton chunk_gated_delta_rule is not reduction-order invariant. Its internal chunking depends on sequence geometry, so batch composition changes the result — this is exactly why the flag alone isn't sufficient. The deterministic torch reference kernel already ships with HF transformers (torch_chunk_gated_delta_rule / torch_recurrent_gated_delta_rule in modeling_qwen3_5.py); we don't have a custom kernel, we just bind it in place of the fused one per GDN layer:

from transformers.models.qwen3_5.modeling_qwen3_5 import (
    torch_chunk_gated_delta_rule, torch_recurrent_gated_delta_rule,
    torch_causal_conv1d_update)
for layer in text_model.layers:
    la = getattr(layer, "linear_attn", None)
    if la is not None:
        la.chunk_gated_delta_rule = torch_chunk_gated_delta_rule
        la.recurrent_gated_delta_rule = torch_recurrent_gated_delta_rule
        la.causal_conv1d_update = torch_causal_conv1d_update
        la.causal_conv1d_fn = None

Why this makes the scan reproducible: torch_chunk_gated_delta_rule casts q/k/v/g/beta to fp32, uses a fixed chunk_size=64, and pads the sequence up to a multiple of it — so the reduction order is fixed regardless of batch/chunk layout. The Triton path instead picks tiles/grid from the sequence geometry and accumulates in lower precision. For us this is a verification tool (it isolates "is my state-carry logic correct" from "is this just Triton kernel noise"); we run FLA in production and accept neighbor-independence (below). For vLLM the takeaway is the design constraint: a truly batch-invariant GDN path needs a scan whose reduction order is fixed independent of batch/chunk layout — not the transformers function itself, but an equivalent property in vLLM's own kernel.

---

The honest bottom line

Even with all three, batch=N was not bit-identical to batch=1 in our setup — the int4 matmul isn't batch-invariant either. So we land on neighbor independence (a slot's output is independent of which other slots ride along, at fixed physical batch size and bucket) rather than full invariance. On FP8/H100 your matmul term is different again, but the three GDN-side sources above should still be in play, and they're the ones you can attack independently.

Don't gate on greedy token equality

The single most useful thing: a single qualitatively-neutral logit difference flips an argmax and the greedy path diverges forever after — looks like a failure, often isn't a quality regression. We switched to a teacher-forced check: feed the same continuation through both states and compare mean KL, top-5 overlap, and symmetric cross-NLL. That cleanly separates "reduction-order noise" from "actually worse predictions" and would make the e2e claims in this PR far easier to defend than a pass/fail needle test — especially at bs≈60 where a needle test will keep tripping on benign argmax flips.

The whole harness is tiny once the decode step is factored out. step_fn(pos, prev_token) -> logits[vocab] is your own single-token decode on a freshly-prefilled state; run the same forced continuation through the batch=1 state and the batch=N state and compare:

import torch, torch.nn.functional as F

def teacher_force(step_fn, forced, first_logits):
    # out[i] = prediction logits for forced[i], context = prompt + forced[:i]
    out = [first_logits]
    for i in range(len(forced) - 1):
        out.append(step_fn(i, forced[i]))
    return torch.stack(out).float()                       # [N, vocab]

def compare(logits_a, logits_b, forced):                  # a = batch1, b = batchN, same context
    forced = torch.as_tensor(forced, device=logits_a.device)
    lp_a, lp_b = F.log_softmax(logits_a, -1), F.log_softmax(logits_b, -1)
    kl   = (lp_a.exp() * (lp_a - lp_b)).sum(-1)            # KL(a||b) per position
    top5 = (logits_b.topk(5, -1).indices
            == logits_a.argmax(-1, keepdim=True)).any(-1).float().mean()
    nll_a = -lp_a.gather(-1, forced[:, None]).mean()       # symmetric cross-NLL:
    nll_b = -lp_b.gather(-1, forced[:, None]).mean()       # neither state predicts "better"
    return dict(mean_kl=kl.mean().item(), top5=top5.item(),
                dnll=abs(nll_a - nll_b).item())

# accept (no quality regression) if:  mean_kl <= 0.02  and  top5 >= 0.97  and  dnll <= 0.05

Run it once with the forced sequence taken from the batch=1 greedy output and once from the batch=N greedy output, so neither state is favored. Those three thresholds are what we treat as "batch-invariant enough" despite non-bit-identical greedy.

That's the whole substance — everything above is standalone. The rest of my files is just model-loading and runner glue specific to my engine, so it wouldn't be drop-in for vLLM anyway. Happy to expand any of these or walk through the cross-chunk carry in more detail if it helps — just say the word. And again: I can't validate any of this at H100/FP8/large-batch scale myself, so treat it as where-to-look, not a verified fix.

BR
Birol

[yuvalluria]

Still actively working on this — the delays were due to H100 GPU access issues on my end (just resolved today after getting PR #46396 test results posted).

I've reviewed @cm2435's validation and Birol's analysis in #48613. The finding is clear: simply setting supports_batch_invariance() = True is not sufficient — the FLA/Triton chunk_gated_delta_rule kernel is not reduction-order invariant, so batch composition changes the result.

From Birol's breakdown, the three GDN-specific sources of non-invariance are:

1. Cross-chunk conv/recurrent state carry is not bit-exact when chunks don't align to 64
2. The Triton kernel picks tiles/grid from sequence geometry, making it batch-composition dependent
3. Int4 matmul is not batch-invariant

I'm now looking at what a proper vLLM-side fix looks like — whether that's switching GDN to the torch reference kernel path when VLLM_BATCH_INVARIANT=1, or implementing chunk-rounding to a multiple of 64. Will update here with a concrete approach.

[mergify]

This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @yuvalluria.

https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/working-with-forks/syncing-a-fork

[yewentao256]

Please test based on test_batch_invariance with GDN_ATTN and attached the output log, your previous one doesn't contain a GDN_ATTN case...

[mergify]

This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @yuvalluria.

https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/working-with-forks/syncing-a-fork

[yuvalluria]

Addressing the request to test test_batch_invariance with a GDN_ATTN case: rebased onto main, fixed the remaining real bitwise-invariance bug (pure decode-only batches took a separate fast path, _forward_core_decode_non_spec -> fused_recurrent_gated_delta_rule_packed_decode, not bitwise identical to the per-request fused_sigmoid_gating_delta_rule_update path used whenever a neighbor was prefilling in the same step, so a decode's result depended on its neighbors). Disabled that fast path under VLLM_BATCH_INVARIANT, and split the one remaining un-split stage (_fused_gdn_gated_rms_norm + out_proj) per request to match the rest of the pipeline.

GPU: NVIDIA H100 NVL | SM: 9.0 | vLLM: 0.33.0 (editable, commit 740a12b5a8) | Torch: 2.14.0+cu130

HF_HOME=/hf-cache VLLM_BATCH_INVARIANT=1 VLLM_TEST_MODEL=Qwen/Qwen3.5-0.8B python3 -m pytest "tests/v1/determinism/test_batch_invariance.py::test_gdn_logprobs_bitwise_batch_invariance_bs1_vs_bsN[eager-FLASH_ATTN]" -v -s

[GDN] Qwen/Qwen3.5-0.8B: 18 GatedDeltaNet layers, full-attn backend=FLASH_ATTN, enforce_eager=True, VLLM_BATCH_INVARIANT=1
PASSED

======================= 1 passed, 17 warnings in 44.82s ========================

HF_HOME=/hf-cache VLLM_BATCH_INVARIANT=1 VLLM_TEST_MODEL=Qwen/Qwen3.5-0.8B python3 -m pytest "tests/v1/determinism/test_batch_invariance.py::test_gdn_logprobs_bitwise_batch_invariance_bs1_vs_bsN[cudagraph-FLASH_ATTN]" -v -s

[GDN] Qwen/Qwen3.5-0.8B: 18 GatedDeltaNet layers, full-attn backend=FLASH_ATTN, enforce_eager=False, VLLM_BATCH_INVARIANT=1
PASSED

======================= 1 passed, 17 warnings in 48.02s ========================

Each parametrization run in its own process. Branch rebased onto current main, head 740a12b5a866873cd99756a3f49df00e4acae0ca.

[mergify]

This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @yuvalluria.

https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/working-with-forks/syncing-a-fork

[number-eleven11]

I tried a local backport of this PR onto vLLM 0.33.0 with Qwen3.8-27B BF16 on H200 (TP=1, eager, no speculative decoding or prefix caching). It got past the GDN_ATTN init error, and the target request matched bit for bit when run alone or in a batch of 16, including with different prompts in the other slots. But scoring the same tokens via decode and full prefill still gave different logprobs: 352/592 differed in one replay.

I traced the second generated token after a 2048-token prefix. The projections and convolution output matched exactly. The first difference was the layer 0 GDN core output (2,366/6,144 elements). For that position, feeding the cached prefix state into the prefill chunk kernel for a single token gave exactly the full-prefill output. Doing that in all GDN layers also made the final logprob match. That points to the recurrent decode path vs. the chunked prefill path. I only checked that substitution at this chunk boundary.

There was a separate issue when comparing full prefill against Megatron TP4. On the exact same convolution inputs and weights, casting both operands to FP32 before multiplying in vLLM's causal conv took the mismatch from 3,006/10,240 elements to zero. Changing just the SiLU expression didn't help. That fixed the convolution mismatch, but the gate calculation still differed, so the end-to-end Megatron logprob isn't bitwise yet.

Would it make sense to add a fixed-token decode vs. full-prefill check to the GDN tests here, or should that live with the shared recurrence work in #60033? @yuvalluria