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Merged
merged 1 commit into from
Jul 18, 2024
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Yaochenger
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@Yaochenger Yaochenger commented Jul 16, 2024

拉取/合并请求描述:(PR description)

[

为什么提交这份PR (why to submit this PR)

qemu-virt64-riscv 适配 rv64ilp32新32位工具链

你的解决方案是什么 (what is your solution)

修改数据类型以支持rv64ilp32

请提供验证的bsp和config (provide the config and bsp)

bsp:qemu-virt64-riscv

rv64ilp32工具链地址

https://github.com/ruyisdk/riscv-gnu-toolchain-rv64ilp32/tags
]

当前拉取/合并请求的状态 Intent for your PR

必须选择一项 Choose one (Mandatory):

  • 本拉取/合并请求是一个草稿版本 This PR is for a code-review and is intended to get feedback
  • 本拉取/合并请求是一个成熟版本 This PR is mature, and ready to be integrated into the repo

代码质量 Code Quality:

我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:

  • 已经仔细查看过代码改动的对比 Already check the difference between PR and old code
  • 代码风格正确,包括缩进空格,命名及其他风格 Style guide is adhered to, including spacing, naming and other styles
  • 没有垃圾代码,代码尽量精简,不包含#if 0代码,不包含已经被注释了的代码 All redundant code is removed and cleaned up
  • 所有变更均有原因及合理的,并且不会影响到其他软件组件代码或BSP All modifications are justified and not affect other components or BSP
  • 对难懂代码均提供对应的注释 I've commented appropriately where code is tricky
  • 代码是高质量的 Code in this PR is of high quality
  • 已经使用formatting 等源码格式化工具确保格式符合RT-Thread代码规范 This PR complies with RT-Thread code specification

@Rbb666 Rbb666 added the Arch: RISC-V BSP related with risc-v label Jul 16, 2024
@Rbb666 Rbb666 requested a review from unicornx July 16, 2024 03:21
#define REGTYPES_H__
#include <rtconfig.h>
#if defined (RT_USING_RV64ILP32)
typedef unsigned long long rt_uintreg_t;
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RTT 已经存在同样语义的类型 rt_ubase_t

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这块是这样的虽然跑的64位机器但是指针 长整型等编出来都是32位的 所以需要这么做一下

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rt_base_t 的语义就是机器字长。64 bits 核心肯定是 64 bits。

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@polarvid polarvid Jul 16, 2024

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跟随指针长度的变量在标准 C 里面是 intptr_t。RTT 这个设计按我的理解就是和 ABI 做解耦的。

typedef signed long rt_base_t; /**< Nbit CPU related data type */
typedef unsigned long rt_ubase_t; /**< Nbit unsigned CPU related data type */

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rt_ubase_t 定义没考虑到不同 ABI 的问题。这个是单独 issue,建议是另外起一个 PR 修复。否则使用 rv64ilp32 的 ABI 时很多组件都跑不起来。单独加入一个新类型并不能从根源解决问题。

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@polarvid polarvid Jul 16, 2024

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不推荐这么处理。用户用得更多的还是常规配置。也包括那个 qemu.sh 脚本。这个特殊配置做成此 bsp 默认等于强迫原先的 bsp 用户使用时每次都要亲自修改一大堆功能。倒不如另外起一个目录来做。

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这里确实得考虑一下

@Rbb666 Rbb666 requested a review from polarvid July 16, 2024 03:43
#define STORE sw
#define LOAD lw
#define FSTORE fsw
#define FLOAD flw
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@Liaoshihua Liaoshihua Jul 16, 2024

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这里关于浮点指令的设置不合理。RISC-V架构中,浮点寄存器的长度由ABI_FLEN决定,与指针长度无关。当ABI_FLEN == 32时,abi 为 ilp32f 或 lp64f,当 ABI_FLEN == 64 时,abi 为 ilp32d 或 lp64d。
区分 rv32 和 rv64应该使用 if __riscv_xlen == 64,区分 ptr 的长度应该使用 __SIZEOF_POINTER__,区分浮点寄存器的长度应该使用 if __riscv_flen == 64 判断,示例如下

#if defined(__riscv_flen) && __riscv_flen == 64
#  define FPR_L fld
#  define FPR_S fsd
#  define SZ_FPR 8
#elif defined(__riscv_flen) && __riscv_flen == 32
#  define FPR_L flw
#  define FPR_S fsw
#  define SZ_FPR 4
#elif defined(__riscv_flen)
# error Q-extension unsupported
#else
#  define SZ_FPR 0
#endif

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@Yaochenger Yaochenger Jul 16, 2024

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在构造线程栈时 代码这里为了统一 将浮点的宽度与整数的宽度做了统一 ;这里引入的宏去区别确实不太恰当;取消了这这里使用宏区别的方式,修改了构造栈函数中的数据类型来适配,相应调整在cpuport.c文件 @Liaoshihua

@Rbb666 Rbb666 requested review from Liaoshihua and removed request for unicornx July 17, 2024 02:12
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4 participants