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[RTL][VAL] MCU TB Trace Testing + MCI interrupt fixes + MCI AXI miss response change#294

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calebofearth merged 12 commits intomainfrom
ckuchta-mcu-trace-buff-test
Apr 18, 2025
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[RTL][VAL] MCU TB Trace Testing + MCI interrupt fixes + MCI AXI miss response change#294
calebofearth merged 12 commits intomainfrom
ckuchta-mcu-trace-buff-test

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@clayton8 clayton8 commented Apr 18, 2025

  • MCU halt status exposed for SOC integration usage on warm reset
  • MCU trace buffer val and monitor added
  • Minor MCU trace buffer fixes
  • Connect FC interrupt to MCI instead of to MCU for uniform interrupt architecture
  • Connect LCC error to MCI AGG Error
  • Minor MCI spec updates
  • MCI AXI read/write misses are dropped or return 0 instead of respond with error to avoid system crashes
  • Remove unused DMI manufacture logic

Debug stress test uses functional unlocking instead of HW forces.

Trace buffer monitor added to SOC BFM with assertions.

All AXI trace buffer tests have been added with a few trace buffer RTL fixes.
MCU halt status should be used by SOC for warm reset to avoid RDC issues.

fc_intr_otp_error connected to MCI's AGG fatal/non-fatal infra.

Connect intr_otp_operation_done to MCI instead of directly do MCU to give
a more uniform interrupt structure for MCU.
@clayton8 clayton8 requested a review from Copilot April 18, 2025 00:49
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Pull Request Overview

This PR updates the MCU trace buffer test infrastructure and related documentation while also fixing interrupt routing and exposing the MCU halt status for SOC integration.

  • Exposes the MCU halt status for SOC integration.
  • Updates trace buffer tests and interrupt handling in MCU test infrastructure.
  • Revises MCI interrupt definitions and documentation to improve clarity and alignment with hardware revisions.

Reviewed Changes

Copilot reviewed 51 out of 56 changed files in this pull request and generated 1 comment.

Show a summary per file
File Description
src/integration/test_suites/smoke_test_mcu_trace_buffer/smoke_test_mcu_trace_buffer.c New test for MCU trace buffer functionality with random write/read loops.
src/integration/test_suites/smoke_test_mcu_trace_buffer/cptra_smoke_test_mcu_trace_buffer.c Simplified test code with an infinite loop to keep the test active.
src/integration/test_suites/smoke_test_mcu_trace_buffer/caliptra_isr.h Added inline ISR routines for error/notification handling with new patterns.
YAML files (smoke_test_mcu_sram_.yml & L_*.yml) Updated pre-exec commands and test generation parameters for various MCU SRAM tests.
src/integration/rtl/soc_address_map.h Added OTP operation done interrupt definitions for uniform interrupt architecture.
docs/CaliptraSSIntegrationSpecification.md & docs/CaliptraSSHardwareSpecification.md Revised documentation to reflect updated memory maps, signal names, and trace buffer behavior.
Files not reviewed (5)
  • src/integration/rtl/caliptra_ss_includes.svh: Language not supported
  • src/integration/rtl/caliptra_ss_top.sv: Language not supported
  • src/integration/rtl/soc_address_map_defines.svh: Language not supported
  • src/integration/rtl/soc_address_map_field_defines.svh: Language not supported
  • src/integration/stimulus/testsuites/caliptra_ss_master_test_list.csv: Language not supported
Comments suppressed due to low confidence (3)

src/integration/test_suites/smoke_test_mcu_trace_buffer/caliptra_isr.h:77

  • [nitpick] Consider replacing the magic constant (0) used in the error condition checks with a named constant to improve clarity and ease future maintenance.
if (sts == 0) {

docs/CaliptraSSHardwareSpecification.md:1395

  • Confirm that the updated WRITE_PTR value (changing from 0x3 to 0x4) is intentional and accurately reflects the hardware behavior for trace packet extraction.
Assuming there is only one trace stored in the trace buffer the WRITE_PTR would read as 0x4. To get the entire trace packet the user would need to read offsets 0x0, 0x1, 0x2, and 0x3.

src/integration/rtl/soc_address_map.h:7787

  • Verify that the newly added OTP_OPERATION_DONE interrupt number and mask are correct as per the latest hardware specification.
#define MCI_REG_INTR_BLOCK_RF_NOTIF0_INTR_EN_R_NOTIF_OTP_OPERATION_DONE_EN_LOW                      (14)

@clayton8 clayton8 changed the title [RTL][VAL] MCU TB Trace Testing, Fix MCI Agg error and interrupts, Expose MCU halt [RTL][VAL] MCU TB Trace Testing + MCI interrupt fixes + MCI AXI miss response change Apr 18, 2025
bharatpillilli
bharatpillilli previously approved these changes Apr 18, 2025
Simplify MCI DMI Memory Map access table to show
Debug intent == Manufacture mode access.

Move MCI DMI Memory Map lower below the definitions used by the
memory map table.

Remove stal MCI DEBUG AXI USER documentation. We no longer have
the concept as a Debug AXI user.
@clayton8 clayton8 requested a review from Copilot April 18, 2025 17:42
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Pull Request Overview

This PR introduces multiple updates to support new interrupt routing, trace buffer enhancements, and adjustments to the MCU AXI responses to improve system stability. Key changes include:

  • Addition of MCU trace buffer test programs and integration of new ISR functionality.
  • Updates to various YAML test configurations (pre-exec commands, plusargs, and test generation counts) for consistency.
  • Documentation updates and new SOC address map definitions to support OTP operation done signals.

Reviewed Changes

Copilot reviewed 51 out of 56 changed files in this pull request and generated no comments.

Show a summary per file
File Description
src/integration/test_suites/smoke_test_mcu_trace_buffer/smoke_test_mcu_trace_buffer.c New test implementation for MCU trace buffer validation.
src/integration/test_suites/smoke_test_mcu_trace_buffer/cptra_smoke_test_mcu_trace_buffer.c Alternative smoke test with minimal functionality for trace buffer.
src/integration/test_suites/smoke_test_mcu_trace_buffer/caliptra_isr.h Added inline ISR service functions for multiple interrupt sources.
Various *.yml files under src/integration/test_suites/ and src/integration/stimulus/ Revised pre-exec commands, plusargs, and test generation parameters for uniform execution.
src/integration/rtl/soc_address_map.h New definitions for OTP operation done interrupt masks and counts.
docs/*.md Updates to integration and hardware specifications reflecting new trace buffer and memory map details.
Files not reviewed (5)
  • src/integration/rtl/caliptra_ss_includes.svh: Language not supported
  • src/integration/rtl/caliptra_ss_top.sv: Language not supported
  • src/integration/rtl/soc_address_map_defines.svh: Language not supported
  • src/integration/rtl/soc_address_map_field_defines.svh: Language not supported
  • src/integration/stimulus/testsuites/caliptra_ss_master_test_list.csv: Language not supported
Comments suppressed due to low confidence (2)

src/integration/test_suites/smoke_test_mcu_trace_buffer/smoke_test_mcu_trace_buffer.c:37

  • [nitpick] Using 'void main(void)' is non-standard; consider using 'int main(void)' to conform with standard C practices unless the embedded environment explicitly requires it.
void main (void) {

docs/CaliptraSSIntegrationSpecification.md:1137

  • Verify that the updated constant (12582912) correctly reflects the intended MCU SRAM address offset; an incorrect constant here could lead to miscalculated memory boundaries.
bits = $clog2(12582912 + ((512 * 1024) - 1))

…h updated timestamp and hash after successful run
@calebofearth calebofearth merged commit 1bef747 into main Apr 18, 2025
6 checks passed
@calebofearth calebofearth deleted the ckuchta-mcu-trace-buff-test branch April 18, 2025 21:52
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4 participants